mirror of https://github.com/llvm/torch-mlir
222 lines
9.7 KiB
C++
222 lines
9.7 KiB
C++
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//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// Also available under a BSD-style license. See LICENSE.
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//
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//===----------------------------------------------------------------------===//
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#include "torch-mlir/Conversion/TorchToTMTensor/TorchToTMTensor.h"
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#include "../PassDetail.h"
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#include "mlir/Dialect/Linalg/IR/Linalg.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/IR/MLIRContext.h"
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#include "torch-mlir-dialects/Dialect/TMTensor/IR/TMTensorDialect.h"
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#include "torch-mlir-dialects/Dialect/TMTensor/IR/TMTensorOps.h"
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#include "torch-mlir/Conversion/Utils/Utils.h"
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#include "torch-mlir/Dialect/Torch/IR/TorchDialect.h"
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#include "torch-mlir/Dialect/Torch/IR/TorchOps.h"
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#include "torch-mlir/Dialect/Torch/IR/TorchTypes.h"
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#include "torch-mlir/Dialect/Torch/Utils/TorchUpstream.h"
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#include "torch-mlir/Dialect/Torch/Utils/Utils.h"
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#include "torch-mlir/Dialect/TorchConversion/Transforms/BackendTypeConversion.h"
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using namespace mlir;
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using namespace mlir::torch;
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using namespace mlir::torch::Torch;
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using namespace mlir::torch::TorchConversion;
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using namespace mlir::torch::TMTensor;
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// -----------------------------------------------------------------------------
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// Patterns (as this grows, it should be organized into multiple files)
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// -----------------------------------------------------------------------------
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// This is going to eventually be O(#aten ops), which is in the 100s.
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//
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// Most of these patterns consist of:
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// 1. Checking that the operand/result types and other static properties are
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// good-enough to create a valid linalg op (such as operands being of
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// ranks/dtypes acceptable to the linalg op).
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// 2. Creating dynamic error guards, usually checking a predicate on the
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// compatibility of operand shapes.
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// 3. Creating init tensors for the computation op. Usually this involves
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// reifying IR for a shape transfer function based on the operand shapes.
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// 4. Creating a named linalg op to replace the original op.
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//
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// TODO: Use linalg OpDSL to autogenerate at least 1)/2)/3) such
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// that these patterns become mostly mechanical associations of
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// "aten.foo -> linalg.foo".
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namespace {
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// aten::bincount op counts the frequency of each value in a 1-d input tensor of
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// non-negative ints.
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class ConvertAtenBincountOp : public OpConversionPattern<AtenBincountOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenBincountOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
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return failure();
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Location loc = op.getLoc();
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MLIRContext *context = op->getContext();
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TypeConverter *typeConverter = getTypeConverter();
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Value input = adaptor.self();
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Value torchTypeInput = op.self();
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Value minlength = adaptor.minlength();
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Value weights = adaptor.weights();
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// TODO: Add a check to verify that the input tensor elements are all
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// non-negative.
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// Check whether the input is a 1-d tensor of integer type or not.
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RankedTensorType inputType = input.getType().cast<RankedTensorType>();
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if (inputType.getRank() != 1 ||
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!inputType.getElementType().isa<mlir::IntegerType>())
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return rewriter.notifyMatchFailure(
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op,
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"Input tensor has to be a one-dimensional tensor of integer type.");
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// Check whether the input tensor element type is i64 or not.
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IntegerType inputIntegerType =
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inputType.getElementType().cast<IntegerType>();
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if (inputIntegerType.getWidth() != 64)
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return rewriter.notifyMatchFailure(
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op,
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"Unimplemented: Integer width not equal to 64 are not supported.");
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// TODO: Incorporate the weight argument.
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if (!weights.getType().isa<mlir::torch::Torch::NoneType>())
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return rewriter.notifyMatchFailure(
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op, "Unimplemented, the weights operand is not incorporated.");
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// Finding the maximum value in the input tensor.
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SmallVector<int64_t> maxTensorSizes;
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ValueTensorType maxTensorType = ValueTensorType::get(
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context, llvm::makeArrayRef(maxTensorSizes),
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torchTypeInput.getType().cast<ValueTensorType>().getDtype());
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Value maxTensor =
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rewriter.create<AtenMaxOp>(loc, maxTensorType, torchTypeInput);
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maxTensor = typeConverter->materializeTargetConversion(
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rewriter, loc, typeConverter->convertType(maxTensor.getType()),
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maxTensor);
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// `maxTensor` is a 0-d tensor, extracting its only element and
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// storing it in `maxInput`.
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Value maxInput = rewriter.create<tensor::ExtractOp>(loc, maxTensor);
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// Creating a tm_tensor.scatter op with the following mapping:
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// 1.) `input` tensor maps to the indices in scatter op. `input` is
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// expanded from 1-d to 2-d, and its element type is set to i32 as required
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// for the scatter op.
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// 2.) `updates` is a 1-d dummy tensor with the size equivalent to the
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// `input`.
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// 3.) `bincount` a 1-d tensor maps to the original in scatter op
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// with size equal to the max(max(input) + 1, minlength).
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SmallVector<int64_t> expandedInputSizes{inputType.getShape()[0], 1};
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ValueTensorType expandInputType = ValueTensorType::get(
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context, llvm::makeArrayRef(expandedInputSizes),
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torchTypeInput.getType().cast<ValueTensorType>().getDtype());
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Value torchCstOne = rewriter.create<Torch::ConstantIntOp>(
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loc, rewriter.getI64IntegerAttr(1));
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Value expandedInputTensor = rewriter.create<AtenUnsqueezeOp>(
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loc, expandInputType, torchTypeInput, torchCstOne);
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// Converting the input element type to i32.
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Value indices = convertTensorToDtype(
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rewriter, loc, expandedInputTensor,
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mlir::IntegerType::get(context, 32, mlir::IntegerType::Signed));
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indices = typeConverter->materializeTargetConversion(
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rewriter, loc, typeConverter->convertType(indices.getType()), indices);
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Type resultElemType = typeConverter->convertType(op->getResult(0).getType())
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.cast<RankedTensorType>()
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.getElementType();
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SmallVector<Value, 1> inputSizeDynamic =
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getTensorSizesUntilDim(rewriter, loc, input, 0);
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Value updatesTensor = rewriter.create<linalg::InitTensorOp>(
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loc, getAsOpFoldResult(inputSizeDynamic), resultElemType);
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Value constantZero = rewriter.create<arith::ConstantOp>(
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loc, rewriter.getZeroAttr(resultElemType));
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Value constantOne = rewriter.create<arith::ConstantIntOp>(
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loc, 1, resultElemType.getIntOrFloatBitWidth());
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// Bincount size = max(max(input) + 1, minlength)
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Value maxInputPlusOne =
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rewriter.create<arith::AddIOp>(loc, maxInput, constantOne);
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Value bincountSize =
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rewriter.create<arith::MaxSIOp>(loc, maxInputPlusOne, minlength);
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bincountSize = castIntToIndex(rewriter, loc, bincountSize);
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Value bincountTensor = createInitTensor(rewriter, loc, {bincountSize},
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resultElemType, constantZero);
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auto scatterOp = rewriter.create<TMTensor::ScatterOp>(
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loc, bincountTensor.getType(), ValueRange{updatesTensor, indices},
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ValueRange{bincountTensor},
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/*unique_indices=*/false);
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Region &scatterOpRegion = scatterOp.region();
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auto &scatterOpBlock = scatterOpRegion.emplaceBlock();
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scatterOpBlock.addArguments(TypeRange{resultElemType, resultElemType},
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{loc, loc});
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auto blockArgs = scatterOpBlock.getArguments();
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// Creating an add instruction inside the scatter op region to increment the
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// frequency counter with one.
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OpBuilder regionBuilder(scatterOpRegion);
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Value add = regionBuilder.create<arith::AddIOp>(loc,
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/*bincount=*/blockArgs[1],
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constantOne);
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regionBuilder.create<TMTensor::YieldOp>(loc, add);
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rewriter.replaceOp(op, scatterOp->getResult(0));
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return success();
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}
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};
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} // namespace
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// -----------------------------------------------------------------------------
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// The pass
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// -----------------------------------------------------------------------------
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namespace {
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class ConvertTorchToTMTensor
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: public ConvertTorchToTMTensorBase<ConvertTorchToTMTensor> {
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public:
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void getDependentDialects(DialectRegistry ®istry) const override {
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registry.insert<linalg::LinalgDialect>();
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registry.insert<StandardOpsDialect>();
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registry.insert<tensor::TensorDialect>();
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registry.insert<arith::ArithmeticDialect>();
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registry.insert<TMTensorDialect>();
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TorchConversion::getBackendTypeConversionDependentDialects(registry);
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}
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void runOnOperation() override {
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MLIRContext *context = &getContext();
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ConversionTarget target(*context);
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target.addLegalDialect<linalg::LinalgDialect, StandardOpsDialect,
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tensor::TensorDialect, arith::ArithmeticDialect,
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Torch::TorchDialect, TMTensorDialect>();
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TypeConverter typeConverter;
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typeConverter.addConversion([](Type type) { return type; });
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TorchConversion::setupBackendTypeConversion(target, typeConverter);
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RewritePatternSet patterns(context);
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target.addIllegalOp<AtenBincountOp>();
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patterns.add<ConvertAtenBincountOp>(typeConverter, context);
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if (failed(applyPartialConversion(getOperation(), target,
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std::move(patterns))))
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return signalPassFailure();
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}
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};
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} // namespace
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std::unique_ptr<OperationPass<FuncOp>>
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mlir::torch::createConvertTorchToTMTensorPass() {
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return std::make_unique<ConvertTorchToTMTensor>();
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}
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