mirror of https://github.com/llvm/torch-mlir
onnx.MelWeightMatrix TorchOnnxToTorch (#3503)
Just uploading what I have till now
[Gist](https://gist.github.com/PhaneeshB/761f75f5522d9f4a40ef949a328e93fe)
of pytorch impl that I'm following to implement the OnnxToTorch lowering
Additional Details - (also pasted as comment in gist)
[Op
Description](https://github.com/onnx/onnx/blob/main/docs/Operators.md#melweightmatrix)
in Onnx Documentation
[Example](https://github.com/onnx/onnx/blob/main/docs/Operators.md#examples-93)
Used the same example in this file.
the Expected output is shown in the example
[Reference Onnx
Impl](4c3ed5e08b/onnx/reference/ops/op_mel_weight_matrix.py (L13))
- This is the base for the above code.
pull/3629/head
Phaneesh Barwaria
GitHub
parent
334633b738
commit
026dfade64
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@ -591,6 +591,373 @@ void mlir::torch::onnx_c::populateDefaultDomainGtoP(
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binder.op, resultType, lhs, rhs);
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return success();
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});
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patterns.onOp(
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"MelWeightMatrix", 17,
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[](OpBinder binder, ConversionPatternRewriter &rewriter) {
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llvm::SmallVector<Value> operands;
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Torch::ValueTensorType resultType;
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int64_t output_dtype_attr;
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if (binder.tensorOperands(operands, 5) ||
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binder.tensorResultType(resultType) || operands.size() != 5 ||
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binder.s64IntegerAttr(output_dtype_attr, "output_datatype", 1)) {
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return failure();
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}
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// operands sequence :
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// num_mel_bins, dft_length, sample_rate -> int32/64 tensors
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// lower_edge_hertz, upper_edge_hertz -> f16/32/64
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// Need to backtrack the values of num_mel_bins and dft_length//2+1 from
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// result shape since the inputs are tensors and we cannot know their
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// values at compile time. if the result type does not contain static
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// shapes, then the implementation will be unsupported.
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if (!resultType.areAllSizesKnown())
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return rewriter.notifyMatchFailure(
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binder.op, "Unknown result sizes, not supported.");
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ArrayRef<int64_t> resShape = resultType.getSizes();
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if (resShape.size() != 2)
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return rewriter.notifyMatchFailure(
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binder.op,
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"Expected result rank to be 2, not supported for other ranks.");
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std::optional<int64_t> torchDTypeInt =
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onnxDtypeIntToTorchDtypeInt(output_dtype_attr);
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if (!torchDTypeInt.has_value()) {
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return rewriter.notifyMatchFailure(
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binder.op, "conversion to given output dtype unsupported");
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}
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// Here Onwards all shapes will be computed using these sizes
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int64_t numSpectrogramBinsInt = resShape[0];
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int64_t numMelBinsInt = resShape[1];
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Torch::ValueTensorType inputIntType = binder.toValidTensorType(
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operands[0].getType()); // Since operands[0 / 1 / 2] will have the
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// same int type.
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Torch::ValueTensorType inputFloatType = binder.toValidTensorType(
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operands[3].getType()); // Since operands[3 / 4] will have the same
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// float type
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Value numMelBinsItem =
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getItemOp<Torch::IntType>(binder, rewriter, operands[0]);
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Value dftLengthItem =
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getItemOp<Torch::IntType>(binder, rewriter, operands[1]);
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Value sampleRateItem =
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getItemOp<Torch::IntType>(binder, rewriter, operands[2]);
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Value lowerEdgeHzItem =
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getItemOp<Torch::FloatType>(binder, rewriter, operands[3]);
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Value upperEdgeHzItem =
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getItemOp<Torch::FloatType>(binder, rewriter, operands[4]);
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// Helpers
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ImplicitLocOpBuilder b(binder.getLoc(), rewriter);
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auto ctx = binder.op->getContext();
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// Recurring shapes
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SmallVector<int64_t> unranked({});
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SmallVector<int64_t> shapeNMB({numMelBinsInt});
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SmallVector<int64_t> shapeNMBp2({numMelBinsInt + 2});
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SmallVector<int64_t> shape1xNMB({1, numMelBinsInt});
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SmallVector<int64_t> shapeNSB({numSpectrogramBinsInt});
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SmallVector<int64_t> shapeNSBxNMB(
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{numSpectrogramBinsInt, numMelBinsInt});
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// Recurring DTypes
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Type inpFpDType = inputFloatType.getDtype();
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Type inpIntDType = inputIntType.getDtype();
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Type si32Ty = rewriter.getIntegerType(32, true);
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Type f32Ty = rewriter.getF32Type();
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Type i1Ty = rewriter.getI1Type();
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// Value constants
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Value noneConst = b.create<Torch::ConstantNoneOp>();
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Value negTwoConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(-2));
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Value negOneConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(-1));
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Value zeroConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(0));
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Value oneConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(1));
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Value twoConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(2));
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Value float32DTypeConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(6));
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Torch::ValueTensorType dftLenType =
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Torch::ValueTensorType::get(ctx, unranked, inpIntDType);
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Type freqBinsIntType =
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Torch::ValueTensorType::get(ctx, shapeNMBp2, si32Ty);
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Type freqBinsFltType =
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Torch::ValueTensorType::get(ctx, shapeNMBp2, f32Ty);
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Value dftLengthDivTwoFlt =
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b.create<Torch::AtenDivIntOp>(dftLengthItem, twoConst);
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Value dftLengthDivTwo =
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b.create<Torch::AtenIntFloatOp>(dftLengthDivTwoFlt);
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Value numSpectrogramBins =
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b.create<Torch::AtenAddIntOp>(dftLengthDivTwo, oneConst);
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Value numSpectrogramBinsItem = numSpectrogramBins;
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Value freqBinsInit = b.create<Torch::AtenArangeOp>(
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freqBinsIntType, numMelBinsItem, /*dtype=*/float32DTypeConst,
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/*layout=*/noneConst, /*device=*/noneConst,
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/*pin_memory=*/noneConst);
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// From Ref Impl of Onnx.MelWeightMatrix:
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// https://github.com/onnx/onnx/blob/main/onnx/reference/ops/op_mel_weight_matrix.py#L25-L32
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// convert input Freq Hz to Mel
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Value twoFiveNineFiveConst =
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b.create<Torch::ConstantFloatOp>(rewriter.getF64FloatAttr(2595));
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Value sevenHConst =
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b.create<Torch::ConstantFloatOp>(rewriter.getF64FloatAttr(700));
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Value tenConst =
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b.create<Torch::ConstantFloatOp>(rewriter.getF64FloatAttr(10));
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Value lfDiv7Hfloat =
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b.create<Torch::AtenDivFloatOp>(lowerEdgeHzItem, sevenHConst);
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Type freqType = Torch::ValueTensorType::get(ctx, unranked, inpFpDType);
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Value lfDiv7H =
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b.create<Torch::PrimNumToTensorScalarOp>(freqType, lfDiv7Hfloat);
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Value lfDiv7HAdd1 = b.create<Torch::AtenAddScalarOp>(
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freqType, lfDiv7H, oneConst, /*alpha =*/oneConst);
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Value lfDiv7HAdd1Log10 =
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b.create<Torch::AtenLog10Op>(freqType, lfDiv7HAdd1);
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Value lfMel = b.create<Torch::AtenMulScalarOp>(
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freqType, lfDiv7HAdd1Log10, twoFiveNineFiveConst);
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Value hfDiv7Hfloat =
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b.create<Torch::AtenDivFloatOp>(upperEdgeHzItem, sevenHConst);
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Value hfDiv7H =
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b.create<Torch::PrimNumToTensorScalarOp>(freqType, hfDiv7Hfloat);
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Value hfDiv7HAdd1 = b.create<Torch::AtenAddScalarOp>(
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freqType, hfDiv7H, oneConst, /*alpha =*/oneConst);
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Value hfDiv7HAdd1Log10 =
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b.create<Torch::AtenLog10Op>(freqType, hfDiv7HAdd1);
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Value hfMel = b.create<Torch::AtenMulScalarOp>(
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freqType, hfDiv7HAdd1Log10, twoFiveNineFiveConst);
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Value hfSubLf = b.create<Torch::AtenSubTensorOp>(
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hfMel.getType(), hfMel, lfMel, /*alpha=*/oneConst);
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Value melStep = b.create<Torch::AtenDivScalarOp>(
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hfSubLf.getType(), hfSubLf, numMelBinsItem);
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Value freqBinsMulMelStep = b.create<Torch::AtenMulTensorOp>(
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freqBinsFltType, freqBinsInit, melStep);
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Value freqBinsScaled = b.create<Torch::AtenAddTensorOp>(
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freqBinsFltType, freqBinsMulMelStep, lfMel, /*alpha=*/oneConst);
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// Mel to Hz conv
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Value fbDiv = b.create<Torch::AtenDivScalarOp>(
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freqBinsFltType, freqBinsScaled, twoFiveNineFiveConst);
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Value fbClone = b.create<Torch::AtenCloneOp>(
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freqBinsFltType, freqBinsScaled, /*memory_format=*/noneConst);
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Value tenTensor = b.create<Torch::AtenFillScalarOp>(freqBinsFltType,
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fbClone, tenConst);
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Value fbPow = b.create<Torch::AtenPowTensorTensorOp>(freqBinsFltType,
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tenTensor, fbDiv);
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Value fbPowSubOne = b.create<Torch::AtenSubScalarOp>(
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freqBinsFltType, fbPow, oneConst, /*alpha=*/oneConst);
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Value freqBinsHz = b.create<Torch::AtenMulScalarOp>(
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freqBinsFltType, fbPowSubOne, sevenHConst);
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// Normalize freqBinsHz
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Value dftLenPlusOne = b.create<Torch::AtenAddScalarOp>(
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dftLenType, operands[1], oneConst, /*alpha=*/oneConst);
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Value dftLenPlusOneItem =
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getItemOp<Torch::IntType>(binder, rewriter, dftLenPlusOne);
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Value fbMulDft = b.create<Torch::AtenMulScalarOp>(
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freqBinsFltType, freqBinsHz, dftLenPlusOneItem);
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Value freqBinsNormalized = b.create<Torch::AtenDivScalarOp>(
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freqBinsFltType, fbMulDft, sampleRateItem);
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// cast to int32
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Value int32DTypeConst =
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b.create<Torch::ConstantIntOp>(rewriter.getI64IntegerAttr(3));
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Value falseConst = b.create<Torch::ConstantBoolOp>(false);
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Value freqBins = b.create<Torch::AtenToDtypeOp>(
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freqBinsIntType, freqBinsNormalized, /*dtype=*/int32DTypeConst,
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/*non_blocking=*/falseConst, /*copy=*/falseConst,
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/*memory_format=*/noneConst);
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Torch::ValueTensorType sliceResType =
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Torch::ValueTensorType::get(ctx, shapeNMB, si32Ty);
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Type unsqueezeResType =
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sliceResType.getWithSizesAndDtype(shape1xNMB, si32Ty);
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Value lfTensor = b.create<Torch::AtenSliceTensorOp>(
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sliceResType, freqBins, /*dim=*/zeroConst, /*start=*/zeroConst,
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/*end=*/negTwoConst, /*step=*/oneConst);
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Value lowFreqTensor = b.create<Torch::AtenUnsqueezeOp>(
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unsqueezeResType, lfTensor, /*dim=*/zeroConst);
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Value cfTensor = b.create<Torch::AtenSliceTensorOp>(
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sliceResType, freqBins, /*dim=*/zeroConst, /*start=*/oneConst,
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/*end=*/negOneConst, /*step=*/oneConst);
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Value centerFreqTensor = b.create<Torch::AtenUnsqueezeOp>(
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unsqueezeResType, cfTensor, /*dim=*/zeroConst);
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Value hfTensor = b.create<Torch::AtenSliceTensorOp>(
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sliceResType, freqBins, /*dim=*/zeroConst, /*start=*/zeroConst,
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/*end=*/noneConst, /*step=*/oneConst);
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Value highFreqTensor = b.create<Torch::AtenUnsqueezeOp>(
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unsqueezeResType, hfTensor, /*dim=*/zeroConst);
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Value lowToCenter =
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b.create<Torch::AtenSubTensorOp>(unsqueezeResType, centerFreqTensor,
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lowFreqTensor, /*alpha=*/oneConst);
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Value centerToHigh = b.create<Torch::AtenSubTensorOp>(
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unsqueezeResType, highFreqTensor, centerFreqTensor,
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/*alpha=*/oneConst);
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Type zeroToNInitType =
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inputIntType.getWithSizesAndDtype(shapeNSB, f32Ty);
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Value zeroToNInit = b.create<Torch::AtenArangeOp>(
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zeroToNInitType, numSpectrogramBinsItem,
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/*dtype=*/float32DTypeConst,
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/*layout=*/noneConst, /*device=*/noneConst,
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/*pin_memory=*/noneConst);
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Type zeroToNBaseType = inputIntType.getWithSizesAndDtype(
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ArrayRef<int64_t>{numSpectrogramBinsInt, 1}, f32Ty);
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Value zeroToNBase = b.create<Torch::AtenUnsqueezeOp>(
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zeroToNBaseType, zeroToNInit, /*dim=*/oneConst);
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Type zeroToNumElesType =
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inputIntType.getWithSizesAndDtype(shapeNSBxNMB, f32Ty);
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Value expandShapeList = b.create<Torch::PrimListConstructOp>(
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rewriter.getType<Torch::ListType>(
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rewriter.getType<Torch::IntType>()),
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SmallVector<Value>{numSpectrogramBinsItem, numMelBinsItem});
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Value zeroToNumEles = b.create<Torch::AtenExpandOp>(
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zeroToNumElesType, zeroToNBase, expandShapeList,
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/*implicit=*/falseConst);
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Type maskType = inputIntType.getWithSizesAndDtype(shape1xNMB, i1Ty);
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Value maskLowToCenterZero =
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b.create<Torch::AtenEqScalarOp>(maskType, lowToCenter, zeroConst);
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// L2C computation
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Value lowToCenterNoZero = b.create<Torch::AtenWhereScalarSelfOp>(
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unsqueezeResType, maskLowToCenterZero, negOneConst, lowToCenter);
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Type maskL2CAfterCType =
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inputIntType.getWithSizesAndDtype(shapeNSBxNMB, i1Ty);
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Value maskL2CAfterC = b.create<Torch::AtenGtTensorOp>(
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maskL2CAfterCType, zeroToNumEles, centerFreqTensor);
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Type maxLFResTy =
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inputIntType.getWithSizesAndDtype(ArrayRef<int64_t>{1}, si32Ty);
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Value maxLowerFreq =
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b.create<Torch::AtenMaxOp>(maxLFResTy, lowFreqTensor);
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Value maxLowerFreqItem =
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getItemOp<Torch::IntType>(binder, rewriter, maxLowerFreq);
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Value zeroToNumElesL2C = b.create<Torch::AtenWhereScalarSelfOp>(
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zeroToNumElesType, maskLowToCenterZero, maxLowerFreqItem,
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zeroToNumEles);
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Value upslopeDiff = b.create<Torch::AtenSubTensorOp>(
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zeroToNumElesType, zeroToNumElesL2C, lowFreqTensor,
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/*alpha=*/oneConst);
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Type l2cNZFltTy = inputIntType.getWithSizesAndDtype(shape1xNMB, f32Ty);
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Value l2cNZFlt = b.create<Torch::AtenToDtypeOp>(
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l2cNZFltTy, lowToCenterNoZero, /*dtype=*/float32DTypeConst,
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/*non_blocking=*/falseConst, /*copy=*/falseConst,
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/*memory_format=*/noneConst);
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Value upslopeL2C0 = b.create<Torch::AtenDivTensorOp>(
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zeroToNumElesType, upslopeDiff, l2cNZFlt);
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Type maskUpslopeL2C0PosType =
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inputIntType.getWithSizesAndDtype(shapeNSBxNMB, i1Ty);
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Value maskUpslopeL2C0Pos = b.create<Torch::AtenGtScalarOp>(
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maskUpslopeL2C0PosType, upslopeL2C0, zeroConst);
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Value upslopeL2C0PosRanged = b.create<Torch::AtenWhereScalarOtherOp>(
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zeroToNumElesType, maskUpslopeL2C0Pos, upslopeL2C0, zeroConst);
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Value maskIdxL2CAfterCList = b.create<Torch::PrimListConstructOp>(
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rewriter.getType<Torch::ListType>(maskL2CAfterC.getType()),
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ValueRange{maskL2CAfterC});
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Value zeroConstTensor = Torch::createRank0Tensor(
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rewriter, binder.getLoc(),
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Torch::ValueTensorType::get(ctx, std::nullopt, f32Ty), zeroConst);
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Value upslopeL2C1 = b.create<Torch::AtenIndexPutOp>(
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zeroToNumElesType, upslopeL2C0PosRanged, maskIdxL2CAfterCList,
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zeroConstTensor, falseConst);
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Value maskIdxL2CZeroList = b.create<Torch::PrimListConstructOp>(
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rewriter.getType<Torch::ListType>(maskLowToCenterZero.getType()),
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ValueRange{maskLowToCenterZero});
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Type centerFreqTensorL2CZeroType =
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inputIntType.getWithSizesAndDtype(ArrayRef<int64_t>{-1}, si32Ty);
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Value centerFreqTensorL2CZero = b.create<Torch::AtenIndexTensorOp>(
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centerFreqTensorL2CZeroType, centerFreqTensor, maskIdxL2CZeroList);
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Type maskSqueezeType =
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inputIntType.getWithSizesAndDtype(shapeNMB, i1Ty);
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Value maskLowToCenterZeroSqueeze = b.create<Torch::AtenSqueezeOp>(
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maskSqueezeType, maskLowToCenterZero);
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Type maskL2CIntTy = inputIntType.getWithSizesAndDtype(shapeNMB, si32Ty);
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Value maskLowToCenterInt = b.create<Torch::AtenToDtypeOp>(
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maskL2CIntTy, maskLowToCenterZeroSqueeze, /*dtype=*/int32DTypeConst,
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/*non_blocking=*/falseConst, /*copy=*/falseConst,
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/*memory_format=*/noneConst);
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Value upslopeOneIdxList = b.create<Torch::PrimListConstructOp>(
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rewriter.getType<Torch::ListType>(
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centerFreqTensorL2CZero.getType()),
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ValueRange{centerFreqTensorL2CZero, maskLowToCenterInt});
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Value oneConstTensor = Torch::createRank0Tensor(
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rewriter, binder.getLoc(),
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Torch::ValueTensorType::get(ctx, std::nullopt, f32Ty), oneConst);
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Value upslopeL2C = b.create<Torch::AtenIndexPutOp>(
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zeroToNumElesType, upslopeL2C1, upslopeOneIdxList, oneConstTensor,
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falseConst);
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// H2C computation
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Value maskCenterToHighZero =
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b.create<Torch::AtenEqScalarOp>(maskType, centerToHigh, zeroConst);
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Value maskH2CBeforeC = b.create<Torch::AtenLtTensorOp>(
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maskL2CAfterCType, zeroToNumEles, centerFreqTensor);
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Value centerToHighNoZero = b.create<Torch::AtenWhereScalarSelfOp>(
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unsqueezeResType, maskCenterToHighZero, negOneConst, centerToHigh);
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Value c2hNZFlt = b.create<Torch::AtenToDtypeOp>(
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l2cNZFltTy, centerToHighNoZero, /*dtype=*/float32DTypeConst,
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/*non_blocking=*/falseConst, /*copy=*/falseConst,
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/*memory_format=*/noneConst);
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Value zeroToNumElesC2H = b.create<Torch::AtenWhereScalarSelfOp>(
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zeroToNumElesType, maskCenterToHighZero, zeroConst, zeroToNumEles);
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Value downslopeDiff = b.create<Torch::AtenSubTensorOp>(
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zeroToNumElesType, highFreqTensor, zeroToNumElesC2H,
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/*alpha=*/oneConst);
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Value downslopeC2H0 = b.create<Torch::AtenDivTensorOp>(
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zeroToNumElesType, downslopeDiff, c2hNZFlt);
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Value maskDownslopeC2H0Pos = b.create<Torch::AtenGtScalarOp>(
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maskUpslopeL2C0PosType, downslopeC2H0, zeroConst);
|
||||
Value downslopeC2H0Pos = b.create<Torch::AtenWhereScalarOtherOp>(
|
||||
zeroToNumElesType, maskDownslopeC2H0Pos, downslopeC2H0, zeroConst);
|
||||
Value idxH2CBeforeCList = b.create<Torch::PrimListConstructOp>(
|
||||
rewriter.getType<Torch::ListType>(maskH2CBeforeC.getType()),
|
||||
ValueRange{maskH2CBeforeC});
|
||||
Value downslopeC2H = b.create<Torch::AtenIndexPutOp>(
|
||||
zeroToNumElesType, downslopeC2H0Pos, idxH2CBeforeCList,
|
||||
zeroConstTensor, falseConst);
|
||||
|
||||
// final result Calculation
|
||||
Value maskH2CNonZero = b.create<Torch::AtenNeScalarOp>(
|
||||
maskL2CAfterCType, downslopeC2H, zeroConst);
|
||||
Value idxH2CNZList = b.create<Torch::PrimListConstructOp>(
|
||||
rewriter.getType<Torch::ListType>(maskH2CNonZero.getType()),
|
||||
ValueRange{maskH2CNonZero});
|
||||
Value upslopeL2CMasked = b.create<Torch::AtenIndexPutOp>(
|
||||
zeroToNumElesType, upslopeL2C, idxH2CNZList, zeroConstTensor,
|
||||
falseConst);
|
||||
|
||||
Value slopesFinal = b.create<Torch::AtenAddTensorOp>(
|
||||
zeroToNumElesType, upslopeL2CMasked, downslopeC2H,
|
||||
/*alpha=*/oneConst);
|
||||
|
||||
Value outputDTypeConst = b.create<Torch::ConstantIntOp>(
|
||||
rewriter.getType<Torch::IntType>(),
|
||||
rewriter.getI64IntegerAttr(torchDTypeInt.value()));
|
||||
Value finalOutput = b.create<Torch::AtenToDtypeOp>(
|
||||
resultType, slopesFinal, /*dtype=*/outputDTypeConst,
|
||||
/*non_blocking=*/falseConst, /*copy=*/falseConst,
|
||||
/*memory_format=*/noneConst);
|
||||
|
||||
rewriter.replaceOp(binder.op, finalOutput);
|
||||
return success();
|
||||
});
|
||||
|
||||
patterns.onOp(
|
||||
"Multinomial", 7,
|
||||
[](OpBinder binder, ConversionPatternRewriter &rewriter) {
|
||||
|
|
|
|||
|
|
@ -1918,3 +1918,119 @@ func.func @test_nonmaxsuppression_single_box(%arg0: !torch.vtensor<[1,1,4],f32>,
|
|||
%0 = torch.operator "onnx.NonMaxSuppression"(%arg0, %arg1, %arg2, %arg3, %arg4) : (!torch.vtensor<[1,1,4],f32>, !torch.vtensor<[1,1,1],f32>, !torch.vtensor<[1],si64>, !torch.vtensor<[1],f32>, !torch.vtensor<[1],f32>) -> !torch.vtensor<[1,3],si64>
|
||||
return %0 : !torch.vtensor<[1,3],si64>
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
// CHECK-LABEL: func.func @test_mwm
|
||||
func.func @test_mwm(%arg0: !torch.vtensor<[],si64>, %arg1: !torch.vtensor<[],si64>, %arg2: !torch.vtensor<[],si64>, %arg3: !torch.vtensor<[],f32>, %arg4: !torch.vtensor<[],f32>) -> !torch.vtensor<[9,8],f32> attributes {torch.onnx_meta.ir_version = 10 : si64, torch.onnx_meta.opset_version = 17 : si64, torch.onnx_meta.producer_name = "test_mwm", torch.onnx_meta.producer_version = ""} {
|
||||
// CHECK-SAME: %[[VAL_0:.*]]: !torch.vtensor<[],si64>, %[[VAL_1:.*]]: !torch.vtensor<[],si64>, %[[VAL_2:.*]]: !torch.vtensor<[],si64>,
|
||||
// CHECK-SAME: %[[VAL_3:.*]]: !torch.vtensor<[],f32>,
|
||||
// CHECK-SAME: %[[VAL_4:.*]]: !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_5:.*]] = torch.constant.none
|
||||
// CHECK: %[[VAL_6:.*]] = torch.aten.item %[[VAL_0]] : !torch.vtensor<[],si64> -> !torch.int
|
||||
// CHECK: %[[VAL_7:.*]] = torch.aten.item %[[VAL_1]] : !torch.vtensor<[],si64> -> !torch.int
|
||||
// CHECK: %[[VAL_8:.*]] = torch.aten.item %[[VAL_2]] : !torch.vtensor<[],si64> -> !torch.int
|
||||
// CHECK: %[[VAL_9:.*]] = torch.aten.item %[[VAL_3]] : !torch.vtensor<[],f32> -> !torch.float
|
||||
// CHECK: %[[VAL_10:.*]] = torch.aten.item %[[VAL_4]] : !torch.vtensor<[],f32> -> !torch.float
|
||||
// CHECK: %[[VAL_11:.*]] = torch.constant.none
|
||||
// CHECK: %[[VAL_12:.*]] = torch.constant.int -2
|
||||
// CHECK: %[[VAL_13:.*]] = torch.constant.int -1
|
||||
// CHECK: %[[VAL_14:.*]] = torch.constant.int 0
|
||||
// CHECK: %[[VAL_15:.*]] = torch.constant.int 1
|
||||
// CHECK: %[[VAL_16:.*]] = torch.constant.int 2
|
||||
// CHECK: %[[VAL_17:.*]] = torch.constant.int 6
|
||||
// CHECK: %[[VAL_18:.*]] = torch.aten.div.int %[[VAL_7]], %[[VAL_16]] : !torch.int, !torch.int -> !torch.float
|
||||
// CHECK: %[[VAL_19:.*]] = torch.aten.Int.float %[[VAL_18]] : !torch.float -> !torch.int
|
||||
// CHECK: %[[VAL_20:.*]] = torch.aten.add.int %[[VAL_19]], %[[VAL_15]] : !torch.int, !torch.int -> !torch.int
|
||||
// CHECK: %[[VAL_21:.*]] = torch.aten.arange %[[VAL_6]], %[[VAL_17]], %[[VAL_11]], %[[VAL_11]], %[[VAL_11]] : !torch.int, !torch.int, !torch.none, !torch.none, !torch.none -> !torch.vtensor<[10],si32>
|
||||
// CHECK: %[[VAL_22:.*]] = torch.constant.float 2.595000e+03
|
||||
// CHECK: %[[VAL_23:.*]] = torch.constant.float 7.000000e+02
|
||||
// CHECK: %[[VAL_24:.*]] = torch.constant.float 1.000000e+01
|
||||
// CHECK: %[[VAL_25:.*]] = torch.aten.div.float %[[VAL_9]], %[[VAL_23]] : !torch.float, !torch.float -> !torch.float
|
||||
// CHECK: %[[VAL_26:.*]] = torch.prim.NumToTensor.Scalar %[[VAL_25]] : !torch.float -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_27:.*]] = torch.aten.add.Scalar %[[VAL_26]], %[[VAL_15]], %[[VAL_15]] : !torch.vtensor<[],f32>, !torch.int, !torch.int -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_28:.*]] = torch.aten.log10 %[[VAL_27]] : !torch.vtensor<[],f32> -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_29:.*]] = torch.aten.mul.Scalar %[[VAL_28]], %[[VAL_22]] : !torch.vtensor<[],f32>, !torch.float -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_30:.*]] = torch.aten.div.float %[[VAL_10]], %[[VAL_23]] : !torch.float, !torch.float -> !torch.float
|
||||
// CHECK: %[[VAL_31:.*]] = torch.prim.NumToTensor.Scalar %[[VAL_30]] : !torch.float -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_32:.*]] = torch.aten.add.Scalar %[[VAL_31]], %[[VAL_15]], %[[VAL_15]] : !torch.vtensor<[],f32>, !torch.int, !torch.int -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_33:.*]] = torch.aten.log10 %[[VAL_32]] : !torch.vtensor<[],f32> -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_34:.*]] = torch.aten.mul.Scalar %[[VAL_33]], %[[VAL_22]] : !torch.vtensor<[],f32>, !torch.float -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_35:.*]] = torch.aten.sub.Tensor %[[VAL_34]], %[[VAL_29]], %[[VAL_15]] : !torch.vtensor<[],f32>, !torch.vtensor<[],f32>, !torch.int -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_36:.*]] = torch.aten.div.Scalar %[[VAL_35]], %[[VAL_6]] : !torch.vtensor<[],f32>, !torch.int -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_37:.*]] = torch.aten.mul.Tensor %[[VAL_21]], %[[VAL_36]] : !torch.vtensor<[10],si32>, !torch.vtensor<[],f32> -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_38:.*]] = torch.aten.add.Tensor %[[VAL_37]], %[[VAL_29]], %[[VAL_15]] : !torch.vtensor<[10],f32>, !torch.vtensor<[],f32>, !torch.int -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_39:.*]] = torch.aten.div.Scalar %[[VAL_38]], %[[VAL_22]] : !torch.vtensor<[10],f32>, !torch.float -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_40:.*]] = torch.aten.clone %[[VAL_38]], %[[VAL_11]] : !torch.vtensor<[10],f32>, !torch.none -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_41:.*]] = torch.aten.fill.Scalar %[[VAL_40]], %[[VAL_24]] : !torch.vtensor<[10],f32>, !torch.float -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_42:.*]] = torch.aten.pow.Tensor_Tensor %[[VAL_41]], %[[VAL_39]] : !torch.vtensor<[10],f32>, !torch.vtensor<[10],f32> -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_43:.*]] = torch.aten.sub.Scalar %[[VAL_42]], %[[VAL_15]], %[[VAL_15]] : !torch.vtensor<[10],f32>, !torch.int, !torch.int -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_44:.*]] = torch.aten.mul.Scalar %[[VAL_43]], %[[VAL_23]] : !torch.vtensor<[10],f32>, !torch.float -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_45:.*]] = torch.aten.add.Scalar %[[VAL_1]], %[[VAL_15]], %[[VAL_15]] : !torch.vtensor<[],si64>, !torch.int, !torch.int -> !torch.vtensor<[],si64>
|
||||
// CHECK: %[[VAL_46:.*]] = torch.aten.item %[[VAL_45]] : !torch.vtensor<[],si64> -> !torch.int
|
||||
// CHECK: %[[VAL_47:.*]] = torch.aten.mul.Scalar %[[VAL_44]], %[[VAL_46]] : !torch.vtensor<[10],f32>, !torch.int -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_48:.*]] = torch.aten.div.Scalar %[[VAL_47]], %[[VAL_8]] : !torch.vtensor<[10],f32>, !torch.int -> !torch.vtensor<[10],f32>
|
||||
// CHECK: %[[VAL_49:.*]] = torch.constant.int 3
|
||||
// CHECK: %[[VAL_50:.*]] = torch.constant.bool false
|
||||
// CHECK: %[[VAL_51:.*]] = torch.aten.to.dtype %[[VAL_48]], %[[VAL_49]], %[[VAL_50]], %[[VAL_50]], %[[VAL_11]] : !torch.vtensor<[10],f32>, !torch.int, !torch.bool, !torch.bool, !torch.none -> !torch.vtensor<[10],si32>
|
||||
// CHECK: %[[VAL_52:.*]] = torch.aten.slice.Tensor %[[VAL_51]], %[[VAL_14]], %[[VAL_14]], %[[VAL_12]], %[[VAL_15]] : !torch.vtensor<[10],si32>, !torch.int, !torch.int, !torch.int, !torch.int -> !torch.vtensor<[8],si32>
|
||||
// CHECK: %[[VAL_53:.*]] = torch.aten.unsqueeze %[[VAL_52]], %[[VAL_14]] : !torch.vtensor<[8],si32>, !torch.int -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_54:.*]] = torch.aten.slice.Tensor %[[VAL_51]], %[[VAL_14]], %[[VAL_15]], %[[VAL_13]], %[[VAL_15]] : !torch.vtensor<[10],si32>, !torch.int, !torch.int, !torch.int, !torch.int -> !torch.vtensor<[8],si32>
|
||||
// CHECK: %[[VAL_55:.*]] = torch.aten.unsqueeze %[[VAL_54]], %[[VAL_14]] : !torch.vtensor<[8],si32>, !torch.int -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_56:.*]] = torch.aten.slice.Tensor %[[VAL_51]], %[[VAL_14]], %[[VAL_14]], %[[VAL_11]], %[[VAL_15]] : !torch.vtensor<[10],si32>, !torch.int, !torch.int, !torch.none, !torch.int -> !torch.vtensor<[8],si32>
|
||||
// CHECK: %[[VAL_57:.*]] = torch.aten.unsqueeze %[[VAL_56]], %[[VAL_14]] : !torch.vtensor<[8],si32>, !torch.int -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_58:.*]] = torch.aten.sub.Tensor %[[VAL_55]], %[[VAL_53]], %[[VAL_15]] : !torch.vtensor<[1,8],si32>, !torch.vtensor<[1,8],si32>, !torch.int -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_59:.*]] = torch.aten.sub.Tensor %[[VAL_57]], %[[VAL_55]], %[[VAL_15]] : !torch.vtensor<[1,8],si32>, !torch.vtensor<[1,8],si32>, !torch.int -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_60:.*]] = torch.aten.arange %[[VAL_20]], %[[VAL_17]], %[[VAL_11]], %[[VAL_11]], %[[VAL_11]] : !torch.int, !torch.int, !torch.none, !torch.none, !torch.none -> !torch.vtensor<[9],f32>
|
||||
// CHECK: %[[VAL_61:.*]] = torch.aten.unsqueeze %[[VAL_60]], %[[VAL_15]] : !torch.vtensor<[9],f32>, !torch.int -> !torch.vtensor<[9,1],f32>
|
||||
// CHECK: %[[VAL_62:.*]] = torch.prim.ListConstruct %[[VAL_20]], %[[VAL_6]] : (!torch.int, !torch.int) -> !torch.list<int>
|
||||
// CHECK: %[[VAL_63:.*]] = torch.aten.expand %[[VAL_61]], %[[VAL_62]], %[[VAL_50]] : !torch.vtensor<[9,1],f32>, !torch.list<int>, !torch.bool -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_64:.*]] = torch.aten.eq.Scalar %[[VAL_58]], %[[VAL_14]] : !torch.vtensor<[1,8],si32>, !torch.int -> !torch.vtensor<[1,8],i1>
|
||||
// CHECK: %[[VAL_65:.*]] = torch.aten.where.ScalarSelf %[[VAL_64]], %[[VAL_13]], %[[VAL_58]] : !torch.vtensor<[1,8],i1>, !torch.int, !torch.vtensor<[1,8],si32> -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_66:.*]] = torch.aten.gt.Tensor %[[VAL_63]], %[[VAL_55]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[1,8],si32> -> !torch.vtensor<[9,8],i1>
|
||||
// CHECK: %[[VAL_67:.*]] = torch.aten.max %[[VAL_53]] : !torch.vtensor<[1,8],si32> -> !torch.vtensor<[1],si32>
|
||||
// CHECK: %[[VAL_68:.*]] = torch.aten.item %[[VAL_67]] : !torch.vtensor<[1],si32> -> !torch.int
|
||||
// CHECK: %[[VAL_69:.*]] = torch.aten.where.ScalarSelf %[[VAL_64]], %[[VAL_68]], %[[VAL_63]] : !torch.vtensor<[1,8],i1>, !torch.int, !torch.vtensor<[9,8],f32> -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_70:.*]] = torch.aten.sub.Tensor %[[VAL_69]], %[[VAL_53]], %[[VAL_15]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[1,8],si32>, !torch.int -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_71:.*]] = torch.aten.to.dtype %[[VAL_65]], %[[VAL_17]], %[[VAL_50]], %[[VAL_50]], %[[VAL_11]] : !torch.vtensor<[1,8],si32>, !torch.int, !torch.bool, !torch.bool, !torch.none -> !torch.vtensor<[1,8],f32>
|
||||
// CHECK: %[[VAL_72:.*]] = torch.aten.div.Tensor %[[VAL_70]], %[[VAL_71]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[1,8],f32> -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_73:.*]] = torch.aten.gt.Scalar %[[VAL_72]], %[[VAL_14]] : !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],i1>
|
||||
// CHECK: %[[VAL_74:.*]] = torch.aten.where.ScalarOther %[[VAL_73]], %[[VAL_72]], %[[VAL_14]] : !torch.vtensor<[9,8],i1>, !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_75:.*]] = torch.prim.ListConstruct %[[VAL_66]] : (!torch.vtensor<[9,8],i1>) -> !torch.list<vtensor<[9,8],i1>>
|
||||
// CHECK: %[[VAL_76:.*]] = torch.prim.ListConstruct : () -> !torch.list<int>
|
||||
// CHECK: %[[VAL_77:.*]] = torch.constant.none
|
||||
// CHECK: %[[VAL_78:.*]] = torch.constant.int 6
|
||||
// CHECK: %[[VAL_79:.*]] = torch.aten.full %[[VAL_76]], %[[VAL_14]], %[[VAL_78]], %[[VAL_77]], %[[VAL_77]], %[[VAL_77]] : !torch.list<int>, !torch.int, !torch.int, !torch.none, !torch.none, !torch.none -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_80:.*]] = torch.aten.index_put %[[VAL_74]], %[[VAL_75]], %[[VAL_79]], %[[VAL_50]] : !torch.vtensor<[9,8],f32>, !torch.list<vtensor<[9,8],i1>>, !torch.vtensor<[],f32>, !torch.bool -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_81:.*]] = torch.prim.ListConstruct %[[VAL_64]] : (!torch.vtensor<[1,8],i1>) -> !torch.list<vtensor<[1,8],i1>>
|
||||
// CHECK: %[[VAL_82:.*]] = torch.aten.index.Tensor %[[VAL_55]], %[[VAL_81]] : !torch.vtensor<[1,8],si32>, !torch.list<vtensor<[1,8],i1>> -> !torch.vtensor<[?],si32>
|
||||
// CHECK: %[[VAL_83:.*]] = torch.aten.squeeze %[[VAL_64]] : !torch.vtensor<[1,8],i1> -> !torch.vtensor<[8],i1>
|
||||
// CHECK: %[[VAL_84:.*]] = torch.aten.to.dtype %[[VAL_83]], %[[VAL_49]], %[[VAL_50]], %[[VAL_50]], %[[VAL_11]] : !torch.vtensor<[8],i1>, !torch.int, !torch.bool, !torch.bool, !torch.none -> !torch.vtensor<[8],si32>
|
||||
// CHECK: %[[VAL_85:.*]] = torch.prim.ListConstruct %[[VAL_82]], %[[VAL_84]] : (!torch.vtensor<[?],si32>, !torch.vtensor<[8],si32>) -> !torch.list<vtensor<[?],si32>>
|
||||
// CHECK: %[[VAL_86:.*]] = torch.prim.ListConstruct : () -> !torch.list<int>
|
||||
// CHECK: %[[VAL_87:.*]] = torch.constant.none
|
||||
// CHECK: %[[VAL_88:.*]] = torch.constant.int 6
|
||||
// CHECK: %[[VAL_89:.*]] = torch.aten.full %[[VAL_86]], %[[VAL_15]], %[[VAL_88]], %[[VAL_87]], %[[VAL_87]], %[[VAL_87]] : !torch.list<int>, !torch.int, !torch.int, !torch.none, !torch.none, !torch.none -> !torch.vtensor<[],f32>
|
||||
// CHECK: %[[VAL_90:.*]] = torch.aten.index_put %[[VAL_80]], %[[VAL_85]], %[[VAL_89]], %[[VAL_50]] : !torch.vtensor<[9,8],f32>, !torch.list<vtensor<[?],si32>>, !torch.vtensor<[],f32>, !torch.bool -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_91:.*]] = torch.aten.eq.Scalar %[[VAL_59]], %[[VAL_14]] : !torch.vtensor<[1,8],si32>, !torch.int -> !torch.vtensor<[1,8],i1>
|
||||
// CHECK: %[[VAL_92:.*]] = torch.aten.lt.Tensor %[[VAL_63]], %[[VAL_55]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[1,8],si32> -> !torch.vtensor<[9,8],i1>
|
||||
// CHECK: %[[VAL_93:.*]] = torch.aten.where.ScalarSelf %[[VAL_91]], %[[VAL_13]], %[[VAL_59]] : !torch.vtensor<[1,8],i1>, !torch.int, !torch.vtensor<[1,8],si32> -> !torch.vtensor<[1,8],si32>
|
||||
// CHECK: %[[VAL_94:.*]] = torch.aten.to.dtype %[[VAL_93]], %[[VAL_17]], %[[VAL_50]], %[[VAL_50]], %[[VAL_11]] : !torch.vtensor<[1,8],si32>, !torch.int, !torch.bool, !torch.bool, !torch.none -> !torch.vtensor<[1,8],f32>
|
||||
// CHECK: %[[VAL_95:.*]] = torch.aten.where.ScalarSelf %[[VAL_91]], %[[VAL_14]], %[[VAL_63]] : !torch.vtensor<[1,8],i1>, !torch.int, !torch.vtensor<[9,8],f32> -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_96:.*]] = torch.aten.sub.Tensor %[[VAL_57]], %[[VAL_95]], %[[VAL_15]] : !torch.vtensor<[1,8],si32>, !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_97:.*]] = torch.aten.div.Tensor %[[VAL_96]], %[[VAL_94]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[1,8],f32> -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_98:.*]] = torch.aten.gt.Scalar %[[VAL_97]], %[[VAL_14]] : !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],i1>
|
||||
// CHECK: %[[VAL_99:.*]] = torch.aten.where.ScalarOther %[[VAL_98]], %[[VAL_97]], %[[VAL_14]] : !torch.vtensor<[9,8],i1>, !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],f32>
|
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// CHECK: %[[VAL_100:.*]] = torch.prim.ListConstruct %[[VAL_92]] : (!torch.vtensor<[9,8],i1>) -> !torch.list<vtensor<[9,8],i1>>
|
||||
// CHECK: %[[VAL_101:.*]] = torch.aten.index_put %[[VAL_99]], %[[VAL_100]], %[[VAL_79]], %[[VAL_50]] : !torch.vtensor<[9,8],f32>, !torch.list<vtensor<[9,8],i1>>, !torch.vtensor<[],f32>, !torch.bool -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_102:.*]] = torch.aten.ne.Scalar %[[VAL_101]], %[[VAL_14]] : !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],i1>
|
||||
// CHECK: %[[VAL_103:.*]] = torch.prim.ListConstruct %[[VAL_102]] : (!torch.vtensor<[9,8],i1>) -> !torch.list<vtensor<[9,8],i1>>
|
||||
// CHECK: %[[VAL_104:.*]] = torch.aten.index_put %[[VAL_90]], %[[VAL_103]], %[[VAL_79]], %[[VAL_50]] : !torch.vtensor<[9,8],f32>, !torch.list<vtensor<[9,8],i1>>, !torch.vtensor<[],f32>, !torch.bool -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_105:.*]] = torch.aten.add.Tensor %[[VAL_104]], %[[VAL_101]], %[[VAL_15]] : !torch.vtensor<[9,8],f32>, !torch.vtensor<[9,8],f32>, !torch.int -> !torch.vtensor<[9,8],f32>
|
||||
// CHECK: %[[VAL_106:.*]] = torch.constant.int 6
|
||||
// CHECK: %[[VAL_107:.*]] = torch.aten.to.dtype %[[VAL_105]], %[[VAL_106]], %[[VAL_50]], %[[VAL_50]], %[[VAL_11]] : !torch.vtensor<[9,8],f32>, !torch.int, !torch.bool, !torch.bool, !torch.none -> !torch.vtensor<[9,8],f32>
|
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// CHECK: return %[[VAL_107]] : !torch.vtensor<[9,8],f32>
|
||||
%none = torch.constant.none
|
||||
%0 = torch.operator "onnx.MelWeightMatrix"(%arg0, %arg1, %arg2, %arg3, %arg4) : (!torch.vtensor<[],si64>, !torch.vtensor<[],si64>, !torch.vtensor<[],si64>, !torch.vtensor<[],f32>, !torch.vtensor<[],f32>) -> !torch.vtensor<[9,8],f32>
|
||||
return %0 : !torch.vtensor<[9,8],f32>
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue