mirror of https://github.com/llvm/torch-mlir
1161 lines
50 KiB
C++
1161 lines
50 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "npcomp/Conversion/TorchToLinalg/TorchToLinalg.h"
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#include "../PassDetail.h"
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#include "mlir/Dialect/Linalg/IR/LinalgOps.h"
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#include "mlir/Dialect/Math/IR/Math.h"
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#include "mlir/Dialect/Tensor/IR/Tensor.h"
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#include "mlir/Dialect/Traits.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "npcomp/Dialect/Torch/IR/TorchOps.h"
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#include "npcomp/Dialect/Torch/Transforms/BackendTypeConversion.h"
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using namespace mlir;
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using namespace mlir::NPCOMP;
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using namespace mlir::NPCOMP::Torch;
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// -----------------------------------------------------------------------------
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// Patterns (as this grows, it should be organized into multiple files)
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// -----------------------------------------------------------------------------
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// This is going to eventually be O(#aten ops), which is in the 100s.
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//
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// Most of these patterns consist of:
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// 1. Checking that the operand/result types and other static properties are
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// good-enough to create a valid linalg op (such as operands being of
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// ranks/dtypes acceptable to the linalg op).
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// 2. Creating dynamic error guards, usually checking a predicate on the
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// compatibility of operand shapes.
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// 3. Creating init tensors for the computation op. Usually this involves
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// reifying IR for a shape transfer function based on the operand shapes.
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// 4. Creating a named linalg op to replace the original op.
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//
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// TODO: Use linalg OpDSL to autogenerate at least 1)/2)/3) such
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// that these patterns become mostly mechanical associations of
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// "aten.foo -> linalg.foo".
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static LogicalResult verifyLinalgCompatibleTypes(Operation *op,
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PatternRewriter &rewriter) {
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// Check the value tensor is ranked as expected by Linalg.
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// TODO: Remove this check but use a separate verification pass to verify the
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// invariants expected by later passes.
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auto isValidLinalgType = [](Type type) {
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auto tensor = type.dyn_cast<ValueTensorType>();
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return !tensor ||
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tensor.toBuiltinTensor().dyn_cast_or_null<RankedTensorType>();
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};
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bool valid = llvm::all_of(op->getOperandTypes(), isValidLinalgType) &&
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llvm::all_of(op->getResultTypes(), isValidLinalgType);
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if (!valid)
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return rewriter.notifyMatchFailure(op, "type cannot be lowered to linalg");
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return success();
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}
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// Hack to deal with the Torch list type arguments which is not supported end
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// to end. Constant values can be be extracted directly and non constant
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// list values are not supported.
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// TODO: loose this constraint when properly support list type
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static bool isConstantIntListMatching(Value &value,
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llvm::SmallVectorImpl<int64_t> &expects) {
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llvm::SmallVector<int64_t> intValues;
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if (!matchPattern(value, m_TorchConstantIntList(intValues)))
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return false;
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if (intValues.size() != expects.size())
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return false;
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for (auto it : llvm::zip(intValues, expects)) {
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if (std::get<0>(it) != std::get<1>(it))
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return false;
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}
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return true;
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}
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static Value getDimOp(OpBuilder &b, Location loc, Value v, int dimension) {
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return b.create<tensor::DimOp>(loc, v, dimension);
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}
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// Helper function to caculate the output tensor dims for convolution-like ops.
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// Along each dim:
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// dim_out =
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// floor((dim_in + 2 * padding - dilation * (kernelSize - 1) - 1) / stride) + 1
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static Value getOutputDimForConvOps(OpBuilder &b, Location loc, Value in,
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Value paddingInt, Value dilationInt,
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Value kernelSizeInt, Value strideInt) {
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Type intType = b.getIntegerType(64);
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Type indexType = b.getIndexType();
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auto castIndexToInt = [&](Value v) {
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return b.create<IndexCastOp>(loc, intType, v);
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};
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auto castIntToIndex = [&](Value v) {
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return b.create<IndexCastOp>(loc, indexType, v);
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};
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Value c1 = b.create<ConstantOp>(loc, b.getI64IntegerAttr(1));
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Value c2 = b.create<ConstantOp>(loc, b.getI64IntegerAttr(2));
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Value doublePadding = b.create<MulIOp>(loc, paddingInt, c2);
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// in + 2 * padding
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Value inAddDoublePadding =
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b.create<AddIOp>(loc, castIndexToInt(in), doublePadding);
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// dilation * (kernelSize - 1)
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Value kernelSizeSub1 = b.create<SubIOp>(loc, kernelSizeInt, c1);
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Value dilationTimesKernelSize =
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b.create<MulIOp>(loc, dilationInt, kernelSizeSub1);
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Value temp =
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b.create<SubIOp>(loc, inAddDoublePadding, dilationTimesKernelSize);
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Value dividend = b.create<SubIOp>(loc, temp, c1);
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Value division = b.create<SignedFloorDivIOp>(loc, dividend, strideInt);
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Value out = b.create<AddIOp>(loc, division, c1);
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return castIntToIndex(out);
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}
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static SmallVector<Value>
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getAsConstantIntValues(OpBuilder &b, Location loc,
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SmallVectorImpl<int64_t> &ints) {
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return llvm::to_vector<4>(llvm::map_range(ints, [&](int64_t val) -> Value {
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return b.create<ConstantOp>(loc, b.getIntegerAttr(b.getI64Type(), val));
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}));
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}
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static SmallVector<Value>
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getAsConstantIndexValues(OpBuilder &b, Location loc,
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SmallVectorImpl<int64_t> &ints) {
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return llvm::to_vector<4>(llvm::map_range(ints, [&](int64_t val) -> Value {
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return b.create<ConstantOp>(loc, b.getIndexAttr(val));
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}));
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}
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static SmallVector<OpFoldResult>
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getAsOpFoldResult(OpBuilder &b, Location loc, SmallVectorImpl<int64_t> &ints) {
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return llvm::to_vector<4>(llvm::map_range(
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ints, [&](int64_t val) -> OpFoldResult { return b.getIndexAttr(val); }));
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}
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// Helper function to get the padding tensor given the padding int values.
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// It's assumed that the padding on the low end and high end are the same.
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static Value getPaddedTensor(Operation *op, OpBuilder &b, Value &input,
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SmallVectorImpl<int64_t> &paddingInts) {
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assert(input.getType().isa<RankedTensorType>() &&
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"input must be RankedTensorType");
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Location loc = op->getLoc();
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Value c0float = b.create<ConstantOp>(
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loc, FloatAttr::get(
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input.getType().cast<RankedTensorType>().getElementType(), 0.0));
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SmallVector<OpFoldResult> paddings = getAsOpFoldResult(b, loc, paddingInts);
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Type ranked4DTensorType = linalg::PadTensorOp::inferResultType(
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input.getType().cast<RankedTensorType>(), paddingInts, paddingInts);
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Value paddedInput = linalg::PadTensorOp::createPadScalarOp(
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ranked4DTensorType, input, c0float, /*low=*/paddings, /*high=*/paddings,
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loc, b);
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return paddedInput;
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}
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namespace {
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class ConvertAtenAdaptiveAvgPool2dOp
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: public OpConversionPattern<AtenAdaptiveAvgPool2dOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenAdaptiveAvgPool2dOp op, llvm::ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op->getLoc();
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MLIRContext *context = op->getContext();
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AtenAdaptiveAvgPool2dOp::Adaptor adaptor(operands);
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Value outputSize = adaptor.output_size();
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Value input = adaptor.self(); /* in form of N*C*H*W */
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RankedTensorType inputType = input.getType().cast<RankedTensorType>();
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Type elementType = inputType.getElementType();
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if (!elementType.isa<mlir::FloatType>())
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op.emitError("unimplemented: non-floating point type");
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auto inputRank = inputType.getRank();
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if (inputRank != 4)
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return rewriter.notifyMatchFailure(op, "input should be rank 4");
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SmallVector<int64_t, 2> expects{1, 1};
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if (!isConstantIntListMatching(outputSize, expects))
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return rewriter.notifyMatchFailure(
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op, "only support output_size with H and W both equal to constant 1");
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Value N = getDimOp(rewriter, loc, input, 0);
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Value C = getDimOp(rewriter, loc, input, 1);
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Value initTensor = rewriter.create<linalg::InitTensorOp>(
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loc, ValueRange{N, C}, elementType);
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Value c0 =
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rewriter.create<ConstantOp>(loc, FloatAttr::get(elementType, 0.0));
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Value initTensor0 =
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rewriter.create<linalg::FillOp>(loc, c0, initTensor).getResult(0);
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SmallVector<AffineExpr, 2> ncExprs;
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ncExprs.push_back(mlir::getAffineDimExpr(0, context));
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ncExprs.push_back(mlir::getAffineDimExpr(1, context));
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auto ncIndexingMap = AffineMap::get(
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/*dimCount=*/4,
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/*symbolCount=*/0, ncExprs, context);
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SmallVector<AffineMap, 2> indexingMaps = {
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rewriter.getMultiDimIdentityMap(4), // input
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ncIndexingMap, // output
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};
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SmallVector<StringRef, 4> iteratorTypesSum{"parallel", "parallel",
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"reduction", "reduction"};
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Value sumPool2d = rewriter
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.create<linalg::GenericOp>(
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loc, initTensor0.getType(), input, initTensor0,
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/*indexingMaps=*/indexingMaps,
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/*iteratorTypes=*/iteratorTypesSum,
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[&](OpBuilder &b, Location loc, ValueRange args) {
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Value input = args[0], sum = args[1];
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Value result =
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rewriter.create<AddFOp>(loc, sum, input);
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b.create<linalg::YieldOp>(loc, result);
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})
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.getResult(0);
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// Calculate H*W so that avg can be got from sum / (H*W)
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Value H = getDimOp(rewriter, loc, input, 2);
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Value W = getDimOp(rewriter, loc, input, 3);
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auto castIndexToInt = [&](Value v) {
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return rewriter.create<IndexCastOp>(loc, IntegerType::get(context, 64),
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v);
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};
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Value HtimesW =
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rewriter.create<MulIOp>(loc, castIndexToInt(H), castIndexToInt(W));
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Value HtimesWf = rewriter.create<SIToFPOp>(loc, elementType, HtimesW);
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Value c1Index = rewriter.create<mlir::ConstantIndexOp>(loc, /*value=*/1);
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Value outputTensor = rewriter.create<linalg::InitTensorOp>(
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loc, ValueRange{N, C, c1Index, c1Index}, elementType);
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SmallVector<AffineMap, 2> indexingMapsAvg{
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ncIndexingMap, rewriter.getMultiDimIdentityMap(4)};
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SmallVector<StringRef, 4> iteratorTypesAvg(4, "parallel");
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Value avgPool2d =
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rewriter
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.create<linalg::GenericOp>(
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loc, outputTensor.getType(), sumPool2d, outputTensor,
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/*indexingMaps=*/indexingMapsAvg,
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/*iteratorTypes=*/iteratorTypesAvg,
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[&](OpBuilder &b, Location loc, ValueRange args) {
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Value avg = b.create<DivFOp>(loc, args[0], HtimesWf);
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b.create<linalg::YieldOp>(loc, avg);
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})
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.getResult(0);
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Type newResultType = getTypeConverter()->convertType(op.getType());
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, avgPool2d);
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return success();
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}
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};
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} // namespace
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namespace {
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class ConvertAtenConv2dOp : public OpConversionPattern<AtenConv2dOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenConv2dOp op, llvm::ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op->getLoc();
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MLIRContext *context = op->getContext();
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AtenConv2dOp::Adaptor adaptor(operands);
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Value input = adaptor.input(); /* in form of N*C*H*W */
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Value weight = adaptor.weight(); /* in form of F*C*H*W */
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Value padding = adaptor.padding();
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Value stride = adaptor.stride();
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Value dilation = adaptor.dilation();
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Value groups = adaptor.groups();
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Type elementType =
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input.getType().cast<RankedTensorType>().getElementType();
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if (!elementType.isa<mlir::FloatType>())
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op.emitError("unimplemented: non-floating point type");
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Type intType = IntegerType::get(context, 64);
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auto castIndexToInt = [&](Value v) {
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return rewriter.create<IndexCastOp>(loc, intType, v);
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};
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Value N = getDimOp(rewriter, loc, input, 0);
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Value Hin = getDimOp(rewriter, loc, input, 2);
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Value Win = getDimOp(rewriter, loc, input, 3);
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Value F = getDimOp(rewriter, loc, weight, 0);
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Value weightH = getDimOp(rewriter, loc, weight, 2);
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Value weightW = getDimOp(rewriter, loc, weight, 3);
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llvm::SmallVector<int64_t> paddingInts;
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if (!matchPattern(padding, m_TorchConstantIntList(paddingInts))) {
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return rewriter.notifyMatchFailure(
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op, "only support constant padding values");
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}
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llvm::SmallVector<int64_t, 2> strideInts;
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if (!matchPattern(stride, m_TorchConstantIntList(strideInts)))
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return rewriter.notifyMatchFailure(op,
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"only support constant int strides");
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llvm::SmallVector<int64_t, 2> dilationInts;
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if (!matchPattern(dilation, m_TorchConstantIntList(dilationInts)))
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return rewriter.notifyMatchFailure(op,
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"only support constant int dilations");
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if (!op.bias().getType().isa<Torch::NoneType>())
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return rewriter.notifyMatchFailure(op, "only support None bias");
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Value c1 = rewriter.create<ConstantOp>(loc, IntegerAttr::get(intType, 1));
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Value groupEqual1 =
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rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, groups, c1);
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rewriter.create<AssertOp>(loc, groupEqual1,
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rewriter.getStringAttr("expect groups to be 1"));
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// Pad the input tensor according to padding.
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SmallVector<int64_t, 4> paddingIncludingNC = {0, 0};
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paddingIncludingNC.insert(paddingIncludingNC.end(), paddingInts.begin(),
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paddingInts.end());
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Value paddedInput =
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getPaddedTensor(op, rewriter, input, paddingIncludingNC);
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SmallVector<Value> paddingIntValues =
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getAsConstantIntValues(rewriter, loc, paddingInts);
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SmallVector<Value> dilationIntValues =
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getAsConstantIntValues(rewriter, loc, dilationInts);
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SmallVector<Value> strideIntValues =
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getAsConstantIntValues(rewriter, loc, strideInts);
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Value Hout = getOutputDimForConvOps(
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rewriter, loc, Hin, paddingIntValues[0], dilationIntValues[0],
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castIndexToInt(weightH), strideIntValues[0]);
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Value Wout = getOutputDimForConvOps(
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rewriter, loc, Win, paddingIntValues[1], dilationIntValues[1],
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castIndexToInt(weightW), strideIntValues[1]);
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Value c0float = rewriter.create<ConstantOp>(
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loc,
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FloatAttr::get(
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input.getType().cast<RankedTensorType>().getElementType(), 0.0));
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Value initTensor = rewriter.create<linalg::InitTensorOp>(
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loc, ValueRange{N, F, Hout, Wout}, elementType);
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Value initTensor0 =
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rewriter.create<linalg::FillOp>(loc, c0float, initTensor).getResult(0);
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auto stridesAttr = rewriter.getI64VectorAttr(strideInts);
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auto dilationAttr = rewriter.getI64VectorAttr(dilationInts);
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Value conv2d =
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rewriter
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.create<linalg::Conv2DNchwOp>(
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loc, initTensor0.getType(), ValueRange{paddedInput, weight},
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initTensor0, stridesAttr, dilationAttr)
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.getResult(0);
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Type newResultType = getTypeConverter()->convertType(op.getType());
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, conv2d);
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return success();
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}
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};
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} // namespace
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namespace {
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class ConvertAtenBatchNormOp : public OpConversionPattern<AtenBatchNormOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenBatchNormOp op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override {
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AtenBatchNormOp::Adaptor adaptor(operands);
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MLIRContext *context = op->getContext();
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Location loc = op->getLoc();
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Value input = adaptor.input();
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Value weight = adaptor.weight();
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Value bias = adaptor.bias();
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Value runningMean = adaptor.running_mean();
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Value runningVar = adaptor.running_var();
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Value training = adaptor.training();
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Value eps = adaptor.eps();
|
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// TODO: Handle the None cases for the optional parameters:
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// weight, bias, running_mean, running_var.
|
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if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
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return failure();
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auto inputType = input.getType().cast<RankedTensorType>();
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auto weightType = weight.getType().cast<RankedTensorType>();
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auto biasType = bias.getType().cast<RankedTensorType>();
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auto runningMeanType = runningMean.getType().cast<RankedTensorType>();
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auto runningVarType = runningVar.getType().cast<RankedTensorType>();
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auto inputRank = inputType.getRank();
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if (inputRank <= 2)
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return rewriter.notifyMatchFailure(
|
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op, "input should have rank larger than 2");
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if (weightType.getRank() != 1 || biasType.getRank() != 1 ||
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runningMeanType.getRank() != 1 || runningVarType.getRank() != 1) {
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return rewriter.notifyMatchFailure(
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op, "expect weight, bias, running_mean and running_var to be rank 1");
|
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}
|
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|
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// TODO: Add support for training.
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auto constFalse = rewriter.create<ConstantOp>(
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loc, IntegerAttr::get(IntegerType::get(context, 1), 0));
|
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auto trainingFalse =
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rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, training, constFalse);
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rewriter.create<AssertOp>(
|
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loc, trainingFalse,
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rewriter.getStringAttr("training is not supported for now"));
|
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|
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// num_features – C from an expected input of size (N,C,D,H,W ...)
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Value numFeatures = rewriter.create<tensor::DimOp>(loc, input, 1);
|
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auto contractingDim0EqualsNumFeatures = [&](Value v) {
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auto dim0 = rewriter.create<tensor::DimOp>(loc, v, 0);
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auto dim0Equal =
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rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, numFeatures, dim0);
|
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rewriter.create<AssertOp>(
|
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loc, dim0Equal,
|
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rewriter.getStringAttr(
|
||
"expect the size of dim 0 equal to the number of features"));
|
||
};
|
||
contractingDim0EqualsNumFeatures(weight);
|
||
contractingDim0EqualsNumFeatures(bias);
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contractingDim0EqualsNumFeatures(runningMean);
|
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contractingDim0EqualsNumFeatures(runningVar);
|
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|
||
auto indexingMap = AffineMap::get(
|
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/*dimCount=*/inputRank,
|
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/*symbolCount=*/0, rewriter.getAffineDimExpr(1), context);
|
||
SmallVector<AffineMap> indexingMaps = {
|
||
rewriter.getMultiDimIdentityMap(inputRank), // input
|
||
indexingMap, // weight
|
||
indexingMap, // bias
|
||
indexingMap, // runningMean
|
||
indexingMap, // runningVar
|
||
rewriter.getMultiDimIdentityMap(inputRank), // output
|
||
};
|
||
SmallVector<StringRef> iteratorTypes(inputRank, "parallel");
|
||
Value batchNorm =
|
||
rewriter
|
||
.create<linalg::GenericOp>(
|
||
loc, input.getType(),
|
||
ValueRange{input, weight, bias, runningMean, runningVar}, input,
|
||
/*indexingMaps=*/indexingMaps,
|
||
/*iteratorTypes=*/iteratorTypes,
|
||
[&](OpBuilder &b, Location loc, ValueRange args) {
|
||
Value input = args[0], weight = args[1], bias = args[2],
|
||
mean = args[3], var = args[4];
|
||
// ((input - mean) / sqrt(var + eps)) * weight + bias
|
||
Value inputSubMean = b.create<SubFOp>(loc, input, mean);
|
||
// The eps is always f64.
|
||
Value truncatedEps =
|
||
b.create<FPTruncOp>(loc, var.getType(), eps);
|
||
Value varPlusEps = b.create<AddFOp>(loc, var, truncatedEps);
|
||
Value rSTD = b.create<math::RsqrtOp>(loc, varPlusEps);
|
||
Value temp = b.create<MulFOp>(loc, inputSubMean, rSTD);
|
||
Value timesWeight = b.create<MulFOp>(loc, temp, weight);
|
||
Value plusBias = b.create<AddFOp>(loc, timesWeight, bias);
|
||
b.create<linalg::YieldOp>(loc, plusBias);
|
||
})
|
||
.getResult(0);
|
||
Type newResultType = getTypeConverter()->convertType(op.getType());
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, batchNorm);
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
namespace {
|
||
class ConvertAtenMmOp : public OpConversionPattern<AtenMmOp> {
|
||
public:
|
||
using OpConversionPattern::OpConversionPattern;
|
||
LogicalResult
|
||
matchAndRewrite(AtenMmOp op, ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
Location loc = op->getLoc();
|
||
Value lhs = operands[0];
|
||
Value rhs = operands[1];
|
||
|
||
// A user can write an errorneous program where `aten.mm` is in fact called
|
||
// with operands of invalid rank or dtype. We cannot convert to linalg in
|
||
// this case or we will get a verifier error, which corresponds to breaking
|
||
// of *internal* compiler invariants, and for a user manifests as a compiler
|
||
// crash in the worst case (such as we try to canonicalize/fold/print the
|
||
// invalid op before the verifier gets to see it -- also release builds of a
|
||
// mature copmiler usually have the verifier turned off for compile time
|
||
// reasons).
|
||
//
|
||
// The compiler cannot crash even if the user wrote an erroneous program!
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
if (lhs.getType().cast<RankedTensorType>().getRank() != 2 ||
|
||
rhs.getType().cast<RankedTensorType>().getRank() != 2) {
|
||
return rewriter.notifyMatchFailure(
|
||
op, "expected both operands to aten.mm to be rank 2");
|
||
}
|
||
|
||
Value lhsDim0 = rewriter.create<tensor::DimOp>(loc, lhs, 0);
|
||
Value lhsDim1 = rewriter.create<tensor::DimOp>(loc, lhs, 1);
|
||
Value rhsDim0 = rewriter.create<tensor::DimOp>(loc, rhs, 0);
|
||
Value rhsDim1 = rewriter.create<tensor::DimOp>(loc, rhs, 1);
|
||
Value contractingDimEqual =
|
||
rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, lhsDim1, rhsDim0);
|
||
rewriter.create<AssertOp>(
|
||
loc, contractingDimEqual,
|
||
rewriter.getStringAttr(
|
||
"mismatching contracting dimension for torch.aten.mm"));
|
||
|
||
Type newResultType = getTypeConverter()->convertType(op.getType());
|
||
Type elementType = newResultType.cast<TensorType>().getElementType();
|
||
Value initTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, ValueRange{lhsDim0, rhsDim1}, elementType);
|
||
Value c0 =
|
||
rewriter.create<ConstantOp>(loc, FloatAttr::get(elementType, 0.0));
|
||
Value zeroFill =
|
||
rewriter.create<linalg::FillOp>(loc, c0, initTensor).getResult(0);
|
||
Value matmul = rewriter
|
||
.create<linalg::MatmulOp>(loc, zeroFill.getType(),
|
||
ValueRange{lhs, rhs}, zeroFill)
|
||
.getResult(0);
|
||
// When constructed with just dynamic sizes, InitTensorOp will have a result
|
||
// type which has all `?`'s for dimensions, which might not be the result
|
||
// type of `op`. The constraints on later linalg ops means that the result
|
||
// of the MatmulOp will have this type too. So cast it to the desired type
|
||
// so that in the end we have the original result type.
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
|
||
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
namespace {
|
||
// See comments at in convertMmOp and the heading for this section for general
|
||
// considerations. This function needs to be auto-generated.
|
||
class ConvertAtenLinearOp : public OpConversionPattern<AtenLinearOp> {
|
||
public:
|
||
using OpConversionPattern::OpConversionPattern;
|
||
LogicalResult
|
||
matchAndRewrite(AtenLinearOp op, ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
AtenLinearOp::Adaptor adaptor(operands);
|
||
MLIRContext *context = op->getContext();
|
||
Location loc = op->getLoc();
|
||
Value input = adaptor.input();
|
||
Value weight = adaptor.weight();
|
||
Value bias = adaptor.bias();
|
||
// TODO: Handle the case of bias being None (bias is optional).
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
auto inputType = input.getType().cast<RankedTensorType>();
|
||
auto weightType = weight.getType().cast<RankedTensorType>();
|
||
auto biasType = bias.getType().cast<RankedTensorType>();
|
||
// Only handle the case of rank 2 `input` for now.
|
||
// TODO: Insert the appropriate reshape to collapse any leading dimensions.
|
||
if (inputType.getRank() != 2 || weightType.getRank() != 2 ||
|
||
biasType.getRank() != 1) {
|
||
return rewriter.notifyMatchFailure(
|
||
op,
|
||
"expected both input and weight to be rank 2 and bias to be rank 1");
|
||
}
|
||
// TODO: Handle type promotion. What are ATen's promotion rules?
|
||
if (inputType.getElementType() != weightType.getElementType() ||
|
||
inputType.getElementType() != biasType.getElementType()) {
|
||
return rewriter.notifyMatchFailure(op, "unimplemented: type promotion");
|
||
}
|
||
|
||
// TODO: We can handle a static size 1 here at some complexity cost, but the
|
||
// dynamic case is not representable in linalg. We don't handle either for
|
||
// now. Biases are generally statically shaped for most models (since for
|
||
// inference they are constants, and for training they don't change shape
|
||
// typically), so this is not too constraining.
|
||
auto biasSize = bias.getType().cast<RankedTensorType>().getShape()[0];
|
||
if (biasSize == 1 || biasSize == ShapedType::kDynamicSize)
|
||
return rewriter.notifyMatchFailure(
|
||
op, "unimplemented: size-1 broadcasting for aten::LinearOp");
|
||
|
||
Value inputDim0 = getDimOp(rewriter, loc, input, 0);
|
||
Value inputDim1 = getDimOp(rewriter, loc, input, 1);
|
||
Value weightDim0 = getDimOp(rewriter, loc, weight, 0);
|
||
Value weightDim1 = getDimOp(rewriter, loc, weight, 1);
|
||
Value biasDim0 = getDimOp(rewriter, loc, bias, 0);
|
||
Value contractingDimEqual =
|
||
rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, inputDim1, weightDim1);
|
||
rewriter.create<AssertOp>(
|
||
loc, contractingDimEqual,
|
||
rewriter.getStringAttr(
|
||
"mismatching contracting dimension for aten.linear"));
|
||
// Here we take advantage of ruling out the size-1 case above.
|
||
// In the static-size-1 case, we will not emit this check at all.
|
||
Value biasSizeCorrect =
|
||
rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, weightDim0, biasDim0);
|
||
rewriter.create<AssertOp>(
|
||
loc, biasSizeCorrect,
|
||
rewriter.getStringAttr("mismatching bias size for aten.linear"));
|
||
|
||
Value initTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, ValueRange{inputDim0, weightDim0}, inputType.getElementType());
|
||
SmallVector<AffineMap> broadcastIndexingMaps = {
|
||
AffineMap::get(
|
||
/*dimCount=*/2, /*symbolCount=*/0, rewriter.getAffineDimExpr(1)),
|
||
rewriter.getMultiDimIdentityMap(2)};
|
||
SmallVector<StringRef> iteratorTypes(2, "parallel");
|
||
Value broadcasted =
|
||
rewriter
|
||
.create<linalg::GenericOp>(
|
||
loc, initTensor.getType(), bias, initTensor,
|
||
/*indexingMaps=*/broadcastIndexingMaps,
|
||
/*iteratorTypes=*/iteratorTypes,
|
||
[](OpBuilder &b, Location loc, ValueRange args) {
|
||
b.create<linalg::YieldOp>(loc, args[0]);
|
||
})
|
||
.getResult(0);
|
||
// We need a matmul with dimension ordering (N, K) * (M, K), so transpose
|
||
// the weights to fit into linalg::MatmulOp which is (N, K) * (K, M).
|
||
// TODO: This whole aten.linear lowering should eventually be generated from
|
||
// a single linalg ODS generator statement. Both the bias and matmul part.
|
||
SmallVector<AffineMap> transposeIndexingMaps = {
|
||
AffineMap::get(
|
||
/*dimCount=*/2, /*symbolCount=*/0,
|
||
{rewriter.getAffineDimExpr(1), rewriter.getAffineDimExpr(0)},
|
||
context),
|
||
rewriter.getMultiDimIdentityMap(2)};
|
||
Value transposedWeightInitTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, ValueRange{weightDim1, weightDim0}, weightType.getElementType());
|
||
Value transposedWeights =
|
||
rewriter
|
||
.create<linalg::GenericOp>(
|
||
loc, transposedWeightInitTensor.getType(), weight,
|
||
transposedWeightInitTensor,
|
||
/*indexingMaps=*/transposeIndexingMaps,
|
||
/*iteratorTypes=*/iteratorTypes,
|
||
[](OpBuilder &b, Location loc, ValueRange args) {
|
||
b.create<linalg::YieldOp>(loc, args[0]);
|
||
})
|
||
.getResult(0);
|
||
Value matmul = rewriter
|
||
.create<linalg::MatmulOp>(
|
||
loc, broadcasted.getType(),
|
||
ValueRange{input, transposedWeights}, broadcasted)
|
||
.getResult(0);
|
||
Type newResultType = getTypeConverter()->convertType(op.getType());
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
static Value createLinalgPayloadCalculationForElementwiseOp(
|
||
OpBuilder &b, Location loc, ValueRange payloadArgs, Operation *op,
|
||
ArrayRef<Value> operands) {
|
||
if (isa<AtenTanhOp>(op))
|
||
return b.create<math::TanhOp>(loc, payloadArgs[0]);
|
||
if (auto relu = dyn_cast<AtenReluOp>(op)) {
|
||
if (!relu.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
relu.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
Type elementType = payloadArgs[0].getType();
|
||
Value constZero =
|
||
b.create<ConstantOp>(loc, FloatAttr::get(elementType, 0.0));
|
||
Value pred =
|
||
b.create<CmpFOp>(loc, CmpFPredicate::UGT, payloadArgs[0], constZero);
|
||
return b.create<SelectOp>(loc, pred, payloadArgs[0], constZero);
|
||
}
|
||
if (auto add = dyn_cast<AtenAddTensorOp>(op)) {
|
||
AtenAddTensorOp::Adaptor adaptor(operands);
|
||
if (add.alpha().getType().isa<Torch::FloatType>()) {
|
||
add.emitError("unimplemented: !torch.float 'alpha'");
|
||
return nullptr;
|
||
}
|
||
if (!add.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
add.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
Value alphaFloat = b.create<mlir::SIToFPOp>(loc, payloadArgs[0].getType(),
|
||
adaptor.alpha());
|
||
Value scaled = b.create<mlir::MulFOp>(loc, payloadArgs[1], alphaFloat);
|
||
return b.create<mlir::AddFOp>(loc, payloadArgs[0], scaled);
|
||
}
|
||
if (auto sub = dyn_cast<AtenSubTensorOp>(op)) {
|
||
AtenSubTensorOp::Adaptor adaptor(operands);
|
||
if (sub.alpha().getType().isa<Torch::FloatType>()) {
|
||
sub.emitError("unimplemented: !torch.float 'alpha'");
|
||
return nullptr;
|
||
}
|
||
if (!sub.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
sub.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
Value alphaFloat = b.create<mlir::SIToFPOp>(loc, payloadArgs[0].getType(),
|
||
adaptor.alpha());
|
||
Value scaled = b.create<mlir::MulFOp>(loc, payloadArgs[1], alphaFloat);
|
||
|
||
return b.create<mlir::SubFOp>(loc, payloadArgs[0], scaled);
|
||
}
|
||
if (auto mul = dyn_cast<AtenMulTensorOp>(op)) {
|
||
if (!mul.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
mul.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
return b.create<mlir::MulFOp>(loc, payloadArgs[0], payloadArgs[1]);
|
||
}
|
||
if (auto div = dyn_cast<AtenDivTensorOp>(op)) {
|
||
if (!div.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
div.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
return b.create<DivFOp>(loc, payloadArgs[0], payloadArgs[1]);
|
||
}
|
||
if (auto lerp = dyn_cast<AtenLerpTensorOp>(op)) {
|
||
if (!lerp.getType()
|
||
.cast<ValueTensorType>()
|
||
.getDtype()
|
||
.isa<mlir::FloatType>()) {
|
||
lerp.emitError("unimplemented: non-floating point dtype");
|
||
return nullptr;
|
||
}
|
||
AtenLerpTensorOp::Adaptor adaptor(payloadArgs);
|
||
auto start = adaptor.self();
|
||
auto end = adaptor.end();
|
||
auto weight = adaptor.weight();
|
||
auto delta = b.create<SubFOp>(loc, end, start);
|
||
auto weightedDelta = b.create<MulFOp>(loc, delta, weight);
|
||
return b.create<AddFOp>(loc, start, weightedDelta);
|
||
}
|
||
op->emitError("unimplemented lowering in "
|
||
"createLinalgPayloadCalculationForElementwiseOp");
|
||
return nullptr;
|
||
}
|
||
|
||
namespace {
|
||
|
||
// Converts an elementwise op.
|
||
// This specifically includes:
|
||
// - converting elementwise ops of any tensor arity
|
||
// - converting elementwise ops with any number of scalar captures (such as a
|
||
// scalar alpha to torch.aten.Add)
|
||
// - broadcasting of static size-1 dimensions
|
||
//
|
||
// Currently, we adopt the behavior that "size 1" broadcasting is a runtime
|
||
// error if it happens dynamically.
|
||
//
|
||
// Looking forward a bit, eventually, it probably makes sense to have
|
||
// a "linalg.generic-like" op for modeling a fused subgraph of numpy-broadcasted
|
||
// operands. Modeling elementwise ops that way is potentially useful to allow a
|
||
// more centralized reasoning about multiversioning. However a cost model will
|
||
// be needed for "pre-fusing" elementwise ops that way, as it can potentially be
|
||
// a pessimization. A mild extension of this pattern should work for such a
|
||
// general op.
|
||
struct ConvertElementwiseOp : ConversionPattern {
|
||
ConvertElementwiseOp(TypeConverter &typeConverter, MLIRContext *context)
|
||
: ConversionPattern(typeConverter, MatchAnyOpTypeTag(), /*benefit=*/1,
|
||
context) {}
|
||
|
||
LogicalResult
|
||
matchAndRewrite(Operation *op, ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
if (!isa<AtenTanhOp, AtenReluOp, AtenAddTensorOp, AtenMulTensorOp,
|
||
AtenDivTensorOp, AtenSubTensorOp, AtenLerpTensorOp>(op))
|
||
return rewriter.notifyMatchFailure(op, "not a supported elementwise op");
|
||
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
|
||
Location loc = op->getLoc();
|
||
auto tensorOperands = llvm::to_vector<6>(llvm::make_filter_range(
|
||
operands, [](Value v) { return v.getType().isa<RankedTensorType>(); }));
|
||
auto resultType = getTypeConverter()
|
||
->convertType(op->getResult(0).getType())
|
||
.cast<RankedTensorType>();
|
||
auto resultRank = resultType.getRank();
|
||
|
||
auto c1 = rewriter.create<mlir::ConstantIndexOp>(loc, /*value=*/1);
|
||
// The overall error handling strategy here is best viewed by thinking about
|
||
// what happens for a single result dimension. This loop not structured that
|
||
// way because it is hard to create the affine maps for each operand unless
|
||
// we structure the loop to iterate over tensor operands as the outer loop
|
||
// instead of inner loop. This pseudocode gives better intuition:
|
||
// ```
|
||
// for each result dimension:
|
||
// for each tensor operand:
|
||
// if it doesn't even have high enough rank relative to the result:
|
||
// continue
|
||
// if it is a static size-1 along this result dimension:
|
||
// continue
|
||
// if this is the first tensor operand that didn't continue above:
|
||
// take its dimension size as the size of the non-broadcasted
|
||
// traversal along this dimension (this may include a dynamic size-1,
|
||
// **non-broadcasted** traversal!)
|
||
// emit error check "if the size does not match the non-broadcasted
|
||
// traversal size along this dimension, error"
|
||
// ```
|
||
// Initialize the resultShape to all 1's, as a fallback in case
|
||
// all sizes along that result dimension are statically 1.
|
||
SmallVector<Value> resultShape(resultRank, c1);
|
||
SmallVector<AffineMap> indexingMaps;
|
||
for (Value tensorOperand : tensorOperands) {
|
||
SmallVector<AffineExpr> exprs;
|
||
auto type = tensorOperand.getType().cast<RankedTensorType>();
|
||
for (auto size : llvm::enumerate(type.getShape())) {
|
||
// If the size is statically known to be 1, we don't want any
|
||
// error guards to be spuriously emitted, since we are specifically
|
||
// allowing size-1 broadcasts in this case, as they correspond to a
|
||
// constant-0 indexing map.
|
||
if (size.value() == 1) {
|
||
exprs.push_back(rewriter.getAffineConstantExpr(0));
|
||
continue;
|
||
}
|
||
|
||
// The rank of this operand might be smaller than the overall rank of
|
||
// the broadcast. Add an offset to correlate it to the correct
|
||
// dimension of the result.
|
||
auto resultDim = size.index() + (resultRank - type.getRank());
|
||
|
||
// The generated linalg op will now be iterating along the full size
|
||
// of this dimension. Record that fact.
|
||
exprs.push_back(rewriter.getAffineDimExpr(resultDim));
|
||
|
||
// Now, we need to ensure that such iteration is not going to trigger
|
||
// undefined behavior, by doing appropriate checks against the current
|
||
// dimension size.
|
||
auto currentDimSize =
|
||
rewriter.create<tensor::DimOp>(loc, tensorOperand, size.index());
|
||
|
||
// If the result size of this dimension has so far only hit the
|
||
// statically-known-to-be-1 case above (i.e., we have not yet assigned a
|
||
// new Value to `resultShape[resultDim]`), then we have no other dynamic
|
||
// values to check against, and merely need to record the current
|
||
// dimension size.
|
||
if (resultShape[resultDim] == c1) {
|
||
resultShape[resultDim] = currentDimSize;
|
||
continue;
|
||
}
|
||
|
||
// We prohibit the size-1 dynamic broadcasting scenario, so just check
|
||
// for exact equality with the running result size.
|
||
// This is the check which protects against the undefined behavior of
|
||
// the generated linalg op in the case of iterating two operands with
|
||
// dimensions sizes that are expected to match.
|
||
auto equalToRunning = rewriter.create<CmpIOp>(
|
||
loc, CmpIPredicate::eq, resultShape[resultDim], currentDimSize);
|
||
rewriter.create<AssertOp>(loc, equalToRunning,
|
||
"mismatched size for broadcast");
|
||
}
|
||
indexingMaps.push_back(AffineMap::get(
|
||
/*dimCount=*/resultRank, /*symbolCount=*/0, exprs, getContext()));
|
||
}
|
||
|
||
SmallVector<StringRef> iteratorTypes(resultRank, "parallel");
|
||
// Add the indexing map for the outs init tensor.
|
||
indexingMaps.push_back(rewriter.getMultiDimIdentityMap(resultRank));
|
||
|
||
Value initTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, resultShape, resultType.getElementType());
|
||
bool hadErrorCreatingPayload = false;
|
||
auto generic = rewriter.create<linalg::GenericOp>(
|
||
loc, /*resultTensorTypes=*/initTensor.getType(),
|
||
/*inputs=*/tensorOperands,
|
||
/*outputs=*/initTensor,
|
||
/*indexingMaps=*/indexingMaps,
|
||
/*iteratorTypes=*/iteratorTypes,
|
||
[&](OpBuilder &b, Location loc, ValueRange payloadArgs) {
|
||
Value result = createLinalgPayloadCalculationForElementwiseOp(
|
||
b, loc, payloadArgs, op, operands);
|
||
if (!result) {
|
||
hadErrorCreatingPayload = true;
|
||
return;
|
||
}
|
||
b.create<linalg::YieldOp>(loc, result);
|
||
});
|
||
if (hadErrorCreatingPayload)
|
||
return failure();
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, resultType,
|
||
generic.getResult(0));
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
namespace {
|
||
class ConvertAtenMaxPool2dOp : public OpConversionPattern<AtenMaxPool2dOp> {
|
||
public:
|
||
using OpConversionPattern::OpConversionPattern;
|
||
LogicalResult
|
||
matchAndRewrite(AtenMaxPool2dOp op, llvm::ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
Location loc = op->getLoc();
|
||
AtenMaxPool2dOp::Adaptor adaptor(operands);
|
||
Value self = adaptor.self();
|
||
Value kernelSize = adaptor.kernel_size();
|
||
Value stride = adaptor.stride();
|
||
Value padding = adaptor.padding();
|
||
Value dilation = adaptor.dilation();
|
||
Value ceilMode = adaptor.ceil_mode();
|
||
|
||
Type elementType = self.getType().cast<RankedTensorType>().getElementType();
|
||
if (!elementType.isa<mlir::FloatType>())
|
||
op.emitError("unimplemented: non-floating point type");
|
||
|
||
llvm::SmallVector<int64_t, 2> strideInts;
|
||
if (!matchPattern(stride, m_TorchConstantIntList(strideInts)))
|
||
return rewriter.notifyMatchFailure(op,
|
||
"only support constant int strides");
|
||
llvm::SmallVector<int64_t, 2> dilationInts;
|
||
if (!matchPattern(dilation, m_TorchConstantIntList(dilationInts)))
|
||
return rewriter.notifyMatchFailure(op,
|
||
"only support constant int dilations");
|
||
llvm::SmallVector<int64_t, 2> paddingInts;
|
||
if (!matchPattern(padding, m_TorchConstantIntList(paddingInts)))
|
||
return rewriter.notifyMatchFailure(op,
|
||
"only support constant int paddings");
|
||
llvm::SmallVector<int64_t, 2> kernelSizeInts;
|
||
if (!matchPattern(kernelSize, m_TorchConstantIntList(kernelSizeInts)))
|
||
return rewriter.notifyMatchFailure(op, "only support kernel size ints");
|
||
|
||
Value falseValue = rewriter.create<ConstantOp>(
|
||
loc, IntegerAttr::get(rewriter.getIntegerType(1), 0));
|
||
Value ceilModeFalse =
|
||
rewriter.create<CmpIOp>(loc, CmpIPredicate::eq, ceilMode, falseValue);
|
||
rewriter.create<AssertOp>(
|
||
loc, ceilModeFalse,
|
||
rewriter.getStringAttr("only ceil_mode false is supported"));
|
||
|
||
SmallVector<int64_t, 4> paddingIncludingNC = {0, 0};
|
||
paddingIncludingNC.insert(paddingIncludingNC.end(), paddingInts.begin(),
|
||
paddingInts.end());
|
||
Value paddedInput = getPaddedTensor(op, rewriter, self, paddingIncludingNC);
|
||
|
||
Value N = getDimOp(rewriter, loc, self, 0);
|
||
Value C = getDimOp(rewriter, loc, self, 1);
|
||
Value H = getDimOp(rewriter, loc, self, 2);
|
||
Value W = getDimOp(rewriter, loc, self, 3);
|
||
|
||
SmallVector<Value> paddingIntValues =
|
||
getAsConstantIntValues(rewriter, loc, paddingInts);
|
||
SmallVector<Value> dilationIntValues =
|
||
getAsConstantIntValues(rewriter, loc, dilationInts);
|
||
SmallVector<Value> kernelSizeIntValues =
|
||
getAsConstantIntValues(rewriter, loc, kernelSizeInts);
|
||
SmallVector<Value> strideIntValues =
|
||
getAsConstantIntValues(rewriter, loc, strideInts);
|
||
|
||
Value Hout = getOutputDimForConvOps(
|
||
rewriter, loc, H, paddingIntValues[0], dilationIntValues[0],
|
||
kernelSizeIntValues[0], strideIntValues[0]);
|
||
Value Wout = getOutputDimForConvOps(
|
||
rewriter, loc, W, paddingIntValues[1], dilationIntValues[1],
|
||
kernelSizeIntValues[1], strideIntValues[1]);
|
||
|
||
// Initialize output tensor with smallest floating point value
|
||
Value outTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, ValueRange{N, C, Hout, Wout}, elementType);
|
||
auto initialAttr = rewriter.getFloatAttr(
|
||
elementType,
|
||
APFloat::getSmallest(
|
||
elementType.cast<mlir::FloatType>().getFloatSemantics(),
|
||
/*Negative*/ true));
|
||
Value initValue = rewriter.create<ConstantOp>(loc, initialAttr);
|
||
Value outTensorInitialized =
|
||
rewriter.create<linalg::FillOp>(loc, initValue, outTensor).getResult(0);
|
||
|
||
auto stridesAttr = rewriter.getI64VectorAttr(strideInts);
|
||
auto dilationAttr = rewriter.getI64VectorAttr(dilationInts);
|
||
Value windowTensor = rewriter.create<linalg::InitTensorOp>(
|
||
loc, getAsConstantIndexValues(rewriter, loc, kernelSizeInts),
|
||
elementType);
|
||
|
||
Value maxPool2d = rewriter
|
||
.create<linalg::PoolingNchwMaxOp>(
|
||
loc, outTensorInitialized.getType(),
|
||
ValueRange{paddedInput, windowTensor},
|
||
outTensorInitialized, stridesAttr, dilationAttr)
|
||
.getResult(0);
|
||
Type newResultType = getTypeConverter()->convertType(op.getType());
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, maxPool2d);
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
namespace {
|
||
class ConvertAtenFlattenUsingIntsOp
|
||
: public OpConversionPattern<AtenFlattenUsingIntsOp> {
|
||
public:
|
||
using OpConversionPattern::OpConversionPattern;
|
||
LogicalResult
|
||
matchAndRewrite(AtenFlattenUsingIntsOp op, llvm::ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
int64_t startDim;
|
||
if (!matchPattern(op.start_dim(), m_TorchConstantInt(&startDim)))
|
||
return rewriter.notifyMatchFailure(op, "start_dim must be constant");
|
||
int64_t endDim;
|
||
if (!matchPattern(op.end_dim(), m_TorchConstantInt(&endDim)))
|
||
return rewriter.notifyMatchFailure(op, "start_dim must be constant");
|
||
auto type = operands[0].getType().cast<RankedTensorType>();
|
||
auto inputRank = type.getRank();
|
||
auto resultType =
|
||
getTypeConverter()->convertType(op.getType()).cast<RankedTensorType>();
|
||
if (startDim < 0)
|
||
startDim += inputRank;
|
||
if (endDim < 0)
|
||
endDim += inputRank;
|
||
|
||
if (inputRank == 0) {
|
||
SmallVector<ReassociationIndices> reassociation;
|
||
if (!(startDim >= -1 && startDim <= 0 && endDim >= -1 && endDim <= 0))
|
||
return rewriter.notifyMatchFailure(
|
||
op, "start_dim and end_dim must be in [-1, 0] when inputRank is 0");
|
||
rewriter.replaceOpWithNewOp<linalg::TensorExpandShapeOp>(
|
||
op, resultType, operands[0], reassociation);
|
||
return success();
|
||
}
|
||
|
||
if (startDim < 0 || startDim >= inputRank || endDim < 0 ||
|
||
endDim >= inputRank || startDim > endDim)
|
||
return rewriter.notifyMatchFailure(
|
||
op, "statically invalid flattening dim range");
|
||
|
||
SmallVector<ReassociationIndices> reassociation(resultType.getRank());
|
||
int j = 0;
|
||
for (auto i : llvm::seq<int64_t>(0, inputRank)) {
|
||
reassociation[j].push_back(i);
|
||
if (i < startDim || i >= endDim)
|
||
j++;
|
||
}
|
||
Value collapsedTensor = rewriter.create<linalg::TensorCollapseShapeOp>(
|
||
op->getLoc(), operands[0], reassociation);
|
||
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, resultType,
|
||
collapsedTensor);
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
namespace {
|
||
class ConvertAtenUnsqueezeOp : public OpConversionPattern<AtenUnsqueezeOp> {
|
||
public:
|
||
using OpConversionPattern::OpConversionPattern;
|
||
LogicalResult
|
||
matchAndRewrite(AtenUnsqueezeOp op, ArrayRef<Value> operands,
|
||
ConversionPatternRewriter &rewriter) const override {
|
||
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
||
return failure();
|
||
int64_t dim;
|
||
if (!matchPattern(op.dim(), m_TorchConstantInt(&dim)))
|
||
return rewriter.notifyMatchFailure(op, "dim must be constant");
|
||
auto inputRank = operands[0].getType().cast<RankedTensorType>().getRank();
|
||
if (dim < 0)
|
||
dim += inputRank + 1;
|
||
if (!(0 <= dim && dim <= inputRank))
|
||
return rewriter.notifyMatchFailure(op, "statically invalid");
|
||
|
||
SmallVector<ReassociationIndices> reassociationMap(inputRank);
|
||
// From the perspective of the reassociation map, the situation of
|
||
// unsqueezing before or after the last dimension is symmetrical.
|
||
// Normalize it to the "before" case.
|
||
// The 0 case is special here, since there is no last dimension to insert
|
||
// before -- we simply rely on the loop below iterating 0 times.
|
||
if (dim == inputRank && inputRank != 0)
|
||
dim = inputRank - 1;
|
||
bool alreadyCrossedExpandedDim = false;
|
||
for (int i = 0; i != inputRank; i++) {
|
||
if (alreadyCrossedExpandedDim) {
|
||
reassociationMap[i].push_back(i + 1);
|
||
} else {
|
||
reassociationMap[i].push_back(i);
|
||
if (i == dim) {
|
||
reassociationMap[i].push_back(i + 1);
|
||
alreadyCrossedExpandedDim = true;
|
||
}
|
||
}
|
||
}
|
||
auto resultType = getTypeConverter()
|
||
->convertType(op->getResult(0).getType())
|
||
.cast<RankedTensorType>();
|
||
rewriter.replaceOpWithNewOp<linalg::TensorExpandShapeOp>(
|
||
op, resultType, operands[0], reassociationMap);
|
||
return success();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
// -----------------------------------------------------------------------------
|
||
// The pass
|
||
// -----------------------------------------------------------------------------
|
||
|
||
namespace {
|
||
class ConvertTorchToLinalg
|
||
: public ConvertTorchToLinalgBase<ConvertTorchToLinalg> {
|
||
public:
|
||
void getDependentDialects(DialectRegistry ®istry) const override {
|
||
registry.insert<linalg::LinalgDialect>();
|
||
registry.insert<math::MathDialect>();
|
||
registry.insert<StandardOpsDialect>();
|
||
registry.insert<tensor::TensorDialect>();
|
||
}
|
||
|
||
void runOnOperation() override {
|
||
MLIRContext *context = &getContext();
|
||
ConversionTarget target(*context);
|
||
target.addLegalDialect<linalg::LinalgDialect, StandardOpsDialect,
|
||
math::MathDialect, tensor::TensorDialect>();
|
||
|
||
TypeConverter typeConverter;
|
||
typeConverter.addConversion([](Type type) { return type; });
|
||
setupBackendTypeConversion(target, typeConverter);
|
||
|
||
RewritePatternSet patterns(context);
|
||
target.addIllegalOp<AtenMmOp>();
|
||
patterns.add<ConvertAtenMmOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenLinearOp>();
|
||
patterns.add<ConvertAtenLinearOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenBatchNormOp>();
|
||
patterns.add<ConvertAtenBatchNormOp>(typeConverter, context);
|
||
target
|
||
.addIllegalOp<AtenTanhOp, AtenReluOp, AtenAddTensorOp, AtenMulTensorOp,
|
||
AtenDivTensorOp, AtenSubTensorOp, AtenLerpTensorOp>();
|
||
patterns.add<ConvertElementwiseOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenUnsqueezeOp>();
|
||
patterns.add<ConvertAtenUnsqueezeOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenConv2dOp>();
|
||
patterns.add<ConvertAtenConv2dOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenAdaptiveAvgPool2dOp>();
|
||
patterns.add<ConvertAtenAdaptiveAvgPool2dOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenFlattenUsingIntsOp>();
|
||
patterns.add<ConvertAtenFlattenUsingIntsOp>(typeConverter, context);
|
||
target.addIllegalOp<AtenMaxPool2dOp>();
|
||
patterns.add<ConvertAtenMaxPool2dOp>(typeConverter, context);
|
||
|
||
if (failed(applyPartialConversion(getOperation(), target,
|
||
std::move(patterns))))
|
||
return signalPassFailure();
|
||
}
|
||
};
|
||
} // namespace
|
||
|
||
std::unique_ptr<OperationPass<FuncOp>>
|
||
mlir::NPCOMP::createConvertTorchToLinalgPass() {
|
||
return std::make_unique<ConvertTorchToLinalg>();
|
||
}
|