mirror of https://github.com/llvm/torch-mlir
1005 lines
43 KiB
C++
1005 lines
43 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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// Also available under a BSD-style license. See LICENSE.
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//
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//===----------------------------------------------------------------------===//
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#include "torch-mlir/Conversion/TorchToLinalg/TorchToLinalg.h"
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#include "../PassDetail.h"
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#include "PopulatePatterns.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/ControlFlow/IR/ControlFlowOps.h"
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#include "mlir/Dialect/Linalg/IR/Linalg.h"
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#include "mlir/Dialect/Tensor/IR/Tensor.h"
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#include "mlir/IR/Matchers.h"
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#include "torch-mlir/Conversion/TorchToLinalg/Utils.h"
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#include "torch-mlir/Conversion/Utils/Utils.h"
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#include "torch-mlir/Dialect/Torch/IR/TorchDialect.h"
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#include "torch-mlir/Dialect/Torch/IR/TorchOps.h"
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#include "torch-mlir/Dialect/Torch/Utils/TorchUpstream.h"
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#include "torch-mlir/Dialect/Torch/Utils/Utils.h"
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#include <algorithm>
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using namespace mlir;
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using namespace mlir::torch;
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using namespace mlir::torch::Torch;
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namespace {
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static void getZeroPoint(Value value, Value &zeropoint) {
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if (auto make = value.getDefiningOp<Aten_MakePerTensorQuantizedTensorOp>()) {
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zeropoint = make.getZeroPoint();
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}
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}
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class ConvertAtenMmOp : public OpConversionPattern<AtenMmOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenMmOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op->getLoc();
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Value lhs = adaptor.getSelf();
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Value rhs = adaptor.getMat2();
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// A user can write an errorneous program where `aten.mm` is in fact called
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// with operands of invalid rank or dtype. We cannot convert to linalg in
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// this case or we will get a verifier error, which corresponds to breaking
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// of *internal* compiler invariants, and for a user manifests as a compiler
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// crash in the worst case (such as we try to canonicalize/fold/print the
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// invalid op before the verifier gets to see it -- also release builds of a
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// mature compiler usually have the verifier turned off for compile time
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// reasons).
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//
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// The compiler cannot crash even if the user wrote an erroneous program!
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if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
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return failure();
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RankedTensorType lhsType = lhs.getType().cast<RankedTensorType>();
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RankedTensorType rhsType = rhs.getType().cast<RankedTensorType>();
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if (lhsType.getRank() != 2 || rhsType.getRank() != 2) {
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return rewriter.notifyMatchFailure(
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op, "expected both operands to aten.mm to be rank 2");
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}
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ValueTensorType lhsTorchType =
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op.getSelf().getType().cast<ValueTensorType>();
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ValueTensorType rhsTorchType =
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op.getMat2().getType().cast<ValueTensorType>();
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Value lhsZeroPoint, rhsZeroPoint;
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getZeroPoint(op.getSelf(), lhsZeroPoint);
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getZeroPoint(op.getMat2(), rhsZeroPoint);
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if (static_cast<bool>(lhsZeroPoint) != static_cast<bool>(lhsZeroPoint)) {
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return rewriter.notifyMatchFailure(
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op, "unsupported: aten.mm with mixed quantization");
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}
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if (lhsTorchType.getDtype() != rhsTorchType.getDtype()) {
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return rewriter.notifyMatchFailure(
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op, "unsupported: aten.mm with different input element types");
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}
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bool isUnsigned = torch_to_linalg::isUnsignedTorchType(lhsTorchType);
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if (lhsZeroPoint && isUnsigned) {
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return rewriter.notifyMatchFailure(
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op, "unsupported: unsigned quantized matmul not supported");
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}
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Value lhsDim0 = rewriter.create<tensor::DimOp>(loc, lhs, 0);
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Value rhsDim1 = rewriter.create<tensor::DimOp>(loc, rhs, 1);
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if (!isAssumingStrictSymbolicShapes(rewriter)) {
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Value lhsDim1 = rewriter.create<tensor::DimOp>(loc, lhs, 1);
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Value rhsDim0 = rewriter.create<tensor::DimOp>(loc, rhs, 0);
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Value contractingDimEqual = rewriter.create<arith::CmpIOp>(
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loc, arith::CmpIPredicate::eq, lhsDim1, rhsDim0);
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rewriter.create<cf::AssertOp>(
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loc, contractingDimEqual,
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rewriter.getStringAttr(
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"mismatching contracting dimension for torch.aten.mm"));
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}
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Type newResultType = getTypeConverter()->convertType(op.getType());
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Type elementType = newResultType.cast<TensorType>().getElementType();
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Value zeroFill = createZeroInitTensor(
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rewriter, loc, ValueRange{lhsDim0, rhsDim1}, elementType);
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Value matmul;
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if (lhsZeroPoint && !isUnsigned) {
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lhsZeroPoint = typeConverter->materializeTargetConversion(
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rewriter, loc,
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getTypeConverter()->convertType(lhsZeroPoint.getType()),
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lhsZeroPoint);
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rhsZeroPoint = typeConverter->materializeTargetConversion(
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rewriter, loc,
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getTypeConverter()->convertType(rhsZeroPoint.getType()),
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rhsZeroPoint);
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lhsZeroPoint = rewriter.create<arith::TruncIOp>(
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loc, rewriter.getI32Type(), lhsZeroPoint);
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rhsZeroPoint = rewriter.create<arith::TruncIOp>(
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loc, rewriter.getI32Type(), rhsZeroPoint);
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matmul =
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rewriter
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.create<linalg::QuantizedMatmulOp>(
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loc, zeroFill.getType(),
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ValueRange{lhs, rhs, lhsZeroPoint, rhsZeroPoint}, zeroFill)
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.getResult(0);
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} else if (isUnsigned) {
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matmul = rewriter
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.create<linalg::MatmulUnsignedOp>(
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loc, zeroFill.getType(), ValueRange{lhs, rhs}, zeroFill)
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.getResult(0);
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} else {
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matmul = rewriter
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.create<linalg::MatmulOp>(loc, zeroFill.getType(),
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ValueRange{lhs, rhs}, zeroFill)
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.getResult(0);
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}
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// When constructed with just dynamic sizes, EmptyOp will have a result
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// type which has all `?`'s for dimensions, which might not be the result
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// type of `op`. The constraints on later linalg ops means that the result
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// of the MatmulOp will have this type too. So cast it to the desired type
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// so that in the end we have the original result type.
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
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return success();
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}
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};
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} // namespace
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namespace {
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class ConvertAtenFlipOp : public OpConversionPattern<AtenFlipOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenFlipOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op->getLoc();
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MLIRContext *context = op.getContext();
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Value self = adaptor.getSelf();
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auto selfRank = adaptor.getSelf().getType().cast<RankedTensorType>().getRank();
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Type elementType =
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adaptor.getSelf().getType().cast<RankedTensorType>().getElementType();
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Value c1 =
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rewriter.create<arith::ConstantOp>(loc, rewriter.getIndexAttr(1));
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SmallVector<int64_t> axis;
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if (!matchPattern(adaptor.getDims(), m_TorchListOfConstantInts(axis)))
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return rewriter.notifyMatchFailure(op,
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"only constant dim lists supported");
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for (unsigned i = 0, e = axis.size(); i < e; i++) {
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axis[i] = toPositiveDim(axis[i], selfRank);
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if (!isValidDim(axis[i], selfRank)) {
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return rewriter.notifyMatchFailure(op, "axis is statically invalid");
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}
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}
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// Only used to calculate flipped values, i.e. those on the flip axes. Other
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// dims won't be used.
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SmallVector<Value> dims = getTensorSizes(rewriter, loc, self);
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for (auto flipDim : axis)
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dims[flipDim] = rewriter.create<arith::SubIOp>(loc, dims[flipDim], c1);
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Value initTensor = createZeroInitTensor(
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rewriter, loc, getTensorSizes(rewriter, loc, self), elementType);
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SmallVector<utils::IteratorType> iteratorTypes(
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selfRank, utils::IteratorType::parallel);
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SmallVector<AffineMap> indexingMaps(
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2, AffineMap::getMultiDimIdentityMap(selfRank, context));
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Value flipped =
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rewriter
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.create<linalg::GenericOp>(
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loc, self.getType(), self, initTensor, indexingMaps,
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iteratorTypes,
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[&](OpBuilder &b, Location loc, ValueRange args) {
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SmallVector<Value> indices;
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for (auto i = 0; i < selfRank; i++)
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indices.push_back(b.create<linalg::IndexOp>(loc, i));
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for (auto flipDim : axis) {
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indices[flipDim] = b.create<arith::SubIOp>(
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loc, dims[flipDim], indices[flipDim]);
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}
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Value res = b.create<tensor::ExtractOp>(loc, self, indices)
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.getResult();
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b.create<linalg::YieldOp>(loc, res);
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})
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, self.getType(), flipped);
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return success();
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}
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};
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} // namespace
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namespace {
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class ConvertAtenMatmulOp : public OpConversionPattern<AtenMatmulOp> {
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public:
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(AtenMatmulOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op->getLoc();
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Value lhs = adaptor.getSelf();
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Value rhs = adaptor.getOther();
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if (failed(verifyLinalgCompatibleTypes(op, rewriter))) {
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return failure();
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}
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auto lhsType = lhs.getType().cast<RankedTensorType>();
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auto rhsType = rhs.getType().cast<RankedTensorType>();
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// Get the rank of both matrix.
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unsigned lhsRank = lhsType.getRank();
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unsigned rhsRank = rhsType.getRank();
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Type newResultType = getTypeConverter()->convertType(op.getType());
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auto resultType = newResultType.cast<RankedTensorType>();
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Type elementType = resultType.getElementType();
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// The different cases of torch_matmul op is mentioned here:
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// https://pytorch.org/docs/stable/generated/torch.matmul.html
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// First Case: Dot Product.
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if (lhsRank == 1 && rhsRank == 1) {
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Value lhsDim0 = getDimOp(rewriter, loc, lhs, 0);
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Value rhsDim0 = getDimOp(rewriter, loc, rhs, 0);
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checkDimEqualHelper(rewriter, loc, lhsDim0, rhsDim0);
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Value zeroTensor = createZeroInitTensor(rewriter, loc, {}, elementType);
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Value dotProd =
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rewriter
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.create<linalg::DotOp>(loc, zeroTensor.getType(),
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ValueRange{lhs, rhs}, zeroTensor)
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, dotProd);
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return success();
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}
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// Second Case: Vec-Mat Multiplication.
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if (lhsRank == 1 && rhsRank == 2) {
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Value lhsDim0 = getDimOp(rewriter, loc, lhs, 0);
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Value rhsDim0 = getDimOp(rewriter, loc, rhs, 0);
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Value rhsDim1 = getDimOp(rewriter, loc, rhs, 1);
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checkDimEqualHelper(rewriter, loc, lhsDim0, rhsDim0);
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Value zeroTensor =
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createZeroInitTensor(rewriter, loc, ValueRange{rhsDim1}, elementType);
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Value matmul =
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rewriter
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.create<linalg::VecmatOp>(loc, zeroTensor.getType(),
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ValueRange{lhs, rhs}, zeroTensor)
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
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return success();
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}
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// Third Case: Matrix-Vec Multiplication.
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if (lhsRank == 2 && rhsRank == 1) {
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Value lhsDim0 = getDimOp(rewriter, loc, lhs, 0);
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Value lhsDim1 = getDimOp(rewriter, loc, lhs, 1);
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Value rhsDim0 = getDimOp(rewriter, loc, rhs, 0);
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checkDimEqualHelper(rewriter, loc, lhsDim1, rhsDim0);
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Value zeroTensor =
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createZeroInitTensor(rewriter, loc, ValueRange{lhsDim0}, elementType);
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Value matmul =
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rewriter
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.create<linalg::MatvecOp>(loc, zeroTensor.getType(),
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ValueRange{lhs, rhs}, zeroTensor)
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
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return success();
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}
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// Fourth Case: Vec-Vec Multiplication.
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if (lhsRank == 2 && rhsRank == 2) {
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Value lhsDim0 = getDimOp(rewriter, loc, lhs, 0);
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Value lhsDim1 = getDimOp(rewriter, loc, lhs, 1);
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Value rhsDim0 = getDimOp(rewriter, loc, rhs, 0);
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Value rhsDim1 = getDimOp(rewriter, loc, rhs, 1);
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checkDimEqualHelper(rewriter, loc, lhsDim1, rhsDim0);
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Value zeroTensor = createZeroInitTensor(
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rewriter, loc, ValueRange{lhsDim0, rhsDim1}, elementType);
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Value matmul =
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rewriter
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.create<linalg::MatmulOp>(loc, zeroTensor.getType(),
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ValueRange{lhs, rhs}, zeroTensor)
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
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return success();
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}
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// Fifth Case: Batch-Matrix Multiplication.
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// TODO: Handle batch matrix multiplication when one of the matrix is unity
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// rank and the other has batch dimension.
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if (lhsRank > 1 && rhsRank > 1) {
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unsigned maxRank = std::max(lhsRank, rhsRank);
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unsigned minRank = std::min(lhsRank, rhsRank);
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unsigned batchRank = maxRank - 2;
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// At least one of the matrix must have rank greater than 2.
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if (batchRank <= 0) {
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return rewriter.notifyMatchFailure(op, "expected batch dimensions");
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}
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// The `broadcastedBatchShape` contains batch dimensions of the resultant
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// matrix.
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SmallVector<Value> broadcastedBatchShape(batchRank);
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Value maxRankMatrix = (lhsRank > rhsRank) ? lhs : rhs;
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Value maxDim;
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// Compute broadcasted batch dimensions if the batch dimensions of
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// the matrices are broadcastable.
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for (unsigned i = 1; i <= batchRank; i++) {
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if (i <= minRank - 2) {
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Value lhsDim = getDimOp(rewriter, loc, lhs, lhsRank - 2 - i);
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Value rhsDim = getDimOp(rewriter, loc, rhs, rhsRank - 2 - i);
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maxDim = rewriter.createOrFold<arith::MaxUIOp>(loc, lhsDim, rhsDim);
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} else {
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maxDim = getDimOp(rewriter, loc, maxRankMatrix, maxRank - 2 - i);
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}
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broadcastedBatchShape[batchRank - i] = maxDim;
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}
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Value lhsDim0 = getDimOp(rewriter, loc, lhs, lhsRank - 2);
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Value lhsDim1 = getDimOp(rewriter, loc, lhs, lhsRank - 1);
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Value rhsDim0 = getDimOp(rewriter, loc, rhs, rhsRank - 2);
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Value rhsDim1 = getDimOp(rewriter, loc, rhs, rhsRank - 1);
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checkDimEqualHelper(rewriter, loc, lhsDim1, rhsDim0);
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// Compute broadcasted shape of both the matrices in integer format.
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SmallVector<Value> lhsBroadcastToShape(broadcastedBatchShape);
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lhsBroadcastToShape.push_back(lhsDim0);
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lhsBroadcastToShape.push_back(lhsDim1);
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SmallVector<Value> rhsBroadcastToShape(broadcastedBatchShape);
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rhsBroadcastToShape.push_back(rhsDim0);
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rhsBroadcastToShape.push_back(rhsDim1);
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for (unsigned i = 0; i < maxRank; i++) {
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lhsBroadcastToShape[i] =
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castIndexToInt64(rewriter, loc, lhsBroadcastToShape[i]);
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rhsBroadcastToShape[i] =
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castIndexToInt64(rewriter, loc, rhsBroadcastToShape[i]);
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}
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// Broadcast the batch dimensions of both the matrices.
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Value broadcastedLhs, broadcastedRhs;
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// TODO: Improve usage of static shape information.
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SmallVector<int64_t> lhsTargetShape(lhsBroadcastToShape.size(),
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ShapedType::kDynamic);
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auto lhsBroadcastType = RankedTensorType::get(
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lhsTargetShape, lhsType.getElementType(), lhsType.getEncoding());
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if (failed(torch_to_linalg::broadcastToGivenShape(
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op, rewriter, lhs, lhsBroadcastToShape, lhsBroadcastType,
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broadcastedLhs))) {
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return rewriter.notifyMatchFailure(
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op, "unable to perform broadcast operation");
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}
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SmallVector<int64_t> rhsTargetShape(rhsBroadcastToShape.size(),
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ShapedType::kDynamic);
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auto rhsBroadcastType = RankedTensorType::get(
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rhsTargetShape, rhsType.getElementType(), rhsType.getEncoding());
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if (failed(torch_to_linalg::broadcastToGivenShape(
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op, rewriter, rhs, rhsBroadcastToShape, rhsBroadcastType,
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broadcastedRhs))) {
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return rewriter.notifyMatchFailure(
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op, "unable to perform broadcast operation");
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}
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if (maxRank == 3) {
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Value zeroTensor = createZeroInitTensor(
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rewriter, loc,
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ValueRange{broadcastedBatchShape[0], lhsDim0, rhsDim1},
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elementType);
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Value matmul =
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rewriter
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.create<linalg::BatchMatmulOp>(
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loc, zeroTensor.getType(),
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ValueRange{broadcastedLhs, broadcastedRhs}, zeroTensor)
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.getResult(0);
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rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, matmul);
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return success();
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}
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// Check if the result of the matrix multiplication has more than one
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// dynamic batch dimensions.
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SmallVector<int64_t> batchDimsInt =
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makeShapeTorchCompatible(resultType.getShape());
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batchDimsInt.pop_back();
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batchDimsInt.pop_back();
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bool multipleDynamicBatchDims =
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llvm::count(batchDimsInt, kUnknownSize) > 1;
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// TODO: Lowering to `linalg.BatchMatmul` is only possible when there is
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// at most one dynamic batch dimension due to limited support of the
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// `tensor.ExpandShape` op.
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if (!multipleDynamicBatchDims) {
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// Collapse the batch dimensions into one dimension. The resultant rank
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// will always be 3.
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SmallVector<ReassociationIndices> reassociation(3);
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for (unsigned i = 0, j = 0; i < maxRank; i++) {
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if (i >= batchRank)
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j++;
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reassociation[j].push_back(i);
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}
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Value collapsedLhs = rewriter.create<tensor::CollapseShapeOp>(
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op->getLoc(), broadcastedLhs, reassociation);
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Value collapsedRhs = rewriter.create<tensor::CollapseShapeOp>(
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op->getLoc(), broadcastedRhs, reassociation);
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// Compute the result shape after collapsing the batch dimensions.
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SmallVector<Value> collapsedResultShape;
|
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collapsedResultShape.push_back(broadcastedBatchShape[0]);
|
|
for (unsigned i = 1; i < batchRank; i++) {
|
|
collapsedResultShape[0] = rewriter.createOrFold<arith::MulIOp>(
|
|
loc, collapsedResultShape[0], broadcastedBatchShape[i]);
|
|
}
|
|
collapsedResultShape.push_back(lhsDim0);
|
|
collapsedResultShape.push_back(rhsDim1);
|
|
SmallVector<OpFoldResult> updatedCollapseResultShape =
|
|
getAsOpFoldResult(collapsedResultShape);
|
|
|
|
Value initTensor = rewriter.create<tensor::EmptyOp>(
|
|
loc, updatedCollapseResultShape, elementType);
|
|
Value c0 = rewriter.create<arith::ConstantOp>(
|
|
loc, rewriter.getZeroAttr(elementType));
|
|
Value zeroTensor =
|
|
rewriter.create<linalg::FillOp>(loc, c0, initTensor).getResult(0);
|
|
|
|
Value batchMatMul =
|
|
rewriter
|
|
.create<linalg::BatchMatmulOp>(
|
|
loc, zeroTensor.getType(),
|
|
ValueRange{collapsedLhs, collapsedRhs}, zeroTensor)
|
|
.getResult(0);
|
|
Value expandResult = rewriter.create<tensor::ExpandShapeOp>(
|
|
loc, resultType, batchMatMul, reassociation);
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType,
|
|
expandResult);
|
|
return success();
|
|
}
|
|
|
|
SmallVector<AffineExpr> lhsExpr;
|
|
SmallVector<AffineExpr> rhsExpr;
|
|
SmallVector<AffineExpr> outExpr;
|
|
SmallVector<utils::IteratorType> iteratorTypes(
|
|
batchRank, utils::IteratorType::parallel);
|
|
for (unsigned i = 0; i < batchRank; i++) {
|
|
lhsExpr.push_back(rewriter.getAffineDimExpr(i));
|
|
rhsExpr.push_back(rewriter.getAffineDimExpr(i));
|
|
outExpr.push_back(rewriter.getAffineDimExpr(i));
|
|
}
|
|
lhsExpr.insert(lhsExpr.end(), {rewriter.getAffineDimExpr(batchRank),
|
|
rewriter.getAffineDimExpr(batchRank + 1)});
|
|
rhsExpr.insert(rhsExpr.end(), {rewriter.getAffineDimExpr(batchRank + 1),
|
|
rewriter.getAffineDimExpr(batchRank + 2)});
|
|
outExpr.insert(outExpr.end(), {rewriter.getAffineDimExpr(batchRank),
|
|
rewriter.getAffineDimExpr(batchRank + 2)});
|
|
|
|
SmallVector<Value> resultShape(broadcastedBatchShape);
|
|
resultShape.insert(resultShape.end(), {lhsDim0, rhsDim1});
|
|
Value zeroTensor =
|
|
createZeroInitTensor(rewriter, loc, resultShape, elementType);
|
|
auto indexingMaps =
|
|
AffineMap::inferFromExprList({lhsExpr, rhsExpr, outExpr});
|
|
iteratorTypes.insert(iteratorTypes.end(),
|
|
{utils::IteratorType::parallel,
|
|
utils::IteratorType::reduction,
|
|
utils::IteratorType::parallel});
|
|
|
|
Value finalRes =
|
|
rewriter
|
|
.create<linalg::GenericOp>(
|
|
loc, zeroTensor.getType(),
|
|
ValueRange{broadcastedLhs, broadcastedRhs}, zeroTensor,
|
|
/*indexingMaps=*/indexingMaps,
|
|
/*iteratorTypes=*/iteratorTypes,
|
|
[&](OpBuilder &b, Location loc, ValueRange args) {
|
|
Value l = args[0], r = args[1], res = args[2];
|
|
Value mul = b.create<arith::MulFOp>(loc, l, r);
|
|
Value add = b.create<arith::AddFOp>(loc, mul, res);
|
|
b.create<linalg::YieldOp>(loc, add);
|
|
})
|
|
.getResult(0);
|
|
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, finalRes);
|
|
return success();
|
|
}
|
|
return failure();
|
|
}
|
|
};
|
|
} // namespace
|
|
|
|
namespace {
|
|
class ConvertAtenBmmOp : public OpConversionPattern<AtenBmmOp> {
|
|
public:
|
|
using OpConversionPattern::OpConversionPattern;
|
|
LogicalResult
|
|
matchAndRewrite(AtenBmmOp op, OpAdaptor adaptor,
|
|
ConversionPatternRewriter &rewriter) const override {
|
|
if (failed(verifyLinalgCompatibleTypes(op, rewriter)))
|
|
return failure();
|
|
Location loc = op->getLoc();
|
|
Value lhs = adaptor.getSelf();
|
|
Value rhs = adaptor.getMat2();
|
|
RankedTensorType lhsType = lhs.getType().cast<RankedTensorType>();
|
|
RankedTensorType rhsType = rhs.getType().cast<RankedTensorType>();
|
|
Type newResultType = getTypeConverter()->convertType(op.getType());
|
|
Type resultElementType = newResultType.cast<RankedTensorType>().getElementType();
|
|
Type lhsElementType = lhsType.cast<RankedTensorType>().getElementType();
|
|
Type rhsElementType = rhsType.cast<RankedTensorType>().getElementType();
|
|
|
|
if (lhsType.getRank() != 3 || rhsType.getRank() != 3) {
|
|
return rewriter.notifyMatchFailure(
|
|
op, "expected both operands to aten.bmm to be rank 3");
|
|
}
|
|
|
|
// Convert the inputs element type equivalent to the result' element type.
|
|
if (lhsElementType != rhsElementType) {
|
|
if (lhsElementType != resultElementType) {
|
|
// True if the lhs element type is not equal to the result' element type.
|
|
lhs = torch_to_linalg::convertTensorToElementType(
|
|
rewriter, loc, lhs, resultElementType);
|
|
} else {
|
|
// True if the rhs element type is not equal to the result' element type.
|
|
rhs = torch_to_linalg::convertTensorToElementType(
|
|
rewriter, loc, rhs, resultElementType);
|
|
}
|
|
}
|
|
|
|
Value lhsDim0 = getDimOp(rewriter, loc, lhs, 0);
|
|
Value lhsDim1 = getDimOp(rewriter, loc, lhs, 1);
|
|
Value lhsDim2 = getDimOp(rewriter, loc, lhs, 2);
|
|
Value rhsDim0 = getDimOp(rewriter, loc, rhs, 0);
|
|
Value rhsDim1 = getDimOp(rewriter, loc, rhs, 1);
|
|
Value rhsDim2 = getDimOp(rewriter, loc, rhs, 2);
|
|
|
|
// Check the batch numbers are equal.
|
|
checkDimEqualHelper(rewriter, loc, lhsDim0, rhsDim0);
|
|
|
|
// Check the matrixs shapes are valid for mulplication.
|
|
checkDimEqualHelper(rewriter, loc, lhsDim2, rhsDim1);
|
|
|
|
Value initTensor0 = createZeroInitTensor(
|
|
rewriter, loc, ValueRange{lhsDim0, lhsDim1, rhsDim2}, resultElementType);
|
|
|
|
Value bmm =
|
|
rewriter
|
|
.create<linalg::BatchMatmulOp>(loc, initTensor0.getType(),
|
|
ValueRange{lhs, rhs}, initTensor0)
|
|
.getResult(0);
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, bmm);
|
|
return success();
|
|
}
|
|
};
|
|
} // namespace
|
|
|
|
namespace {
|
|
class ConvertAtenConvolutionOp : public OpConversionPattern<AtenConvolutionOp> {
|
|
public:
|
|
using OpConversionPattern::OpConversionPattern;
|
|
LogicalResult
|
|
matchAndRewrite(AtenConvolutionOp op, OpAdaptor adaptor,
|
|
ConversionPatternRewriter &rewriter) const override {
|
|
Location loc = op->getLoc();
|
|
MLIRContext *context = op->getContext();
|
|
Value input = adaptor.getInput(); /* in form of N*C*H*W */
|
|
Value weight = adaptor.getWeight(); /* in form of F*C*H*W */
|
|
|
|
bool transposed = true;
|
|
if (!matchPattern(op.getTransposed(), m_TorchConstantBool(&transposed)))
|
|
return rewriter.notifyMatchFailure(
|
|
op, "unimplemented: only constant transposed supported");
|
|
|
|
Type elementType =
|
|
input.getType().cast<RankedTensorType>().getElementType();
|
|
if (!elementType.isa<mlir::FloatType>())
|
|
return op.emitError("unimplemented: non-floating point type");
|
|
size_t inRank = input.getType().cast<RankedTensorType>().getRank();
|
|
size_t numSpacialDims = inRank - 2;
|
|
if (numSpacialDims < 1 || numSpacialDims > 3)
|
|
return rewriter.notifyMatchFailure(
|
|
op, "unimplemented: only 1d-3d convolution currently supported");
|
|
|
|
Type intType = IntegerType::get(context, 64);
|
|
auto castIndexToInt = [&](Value v) {
|
|
return rewriter.create<arith::IndexCastOp>(loc, intType, v);
|
|
};
|
|
|
|
SmallVector<Value> paddingIntValues;
|
|
if (!getListConstructElements(op.getPadding(), paddingIntValues))
|
|
return rewriter.notifyMatchFailure(
|
|
op, "only support padding from a list construct");
|
|
paddingIntValues = getTypeConvertedValues(rewriter, loc, getTypeConverter(),
|
|
paddingIntValues);
|
|
SmallVector<Value> outputPaddingIntValues;
|
|
if (!getListConstructElements(op.getOutputPadding(),
|
|
outputPaddingIntValues))
|
|
return rewriter.notifyMatchFailure(
|
|
op, "only support output_padding from a list construct");
|
|
outputPaddingIntValues = getTypeConvertedValues(
|
|
rewriter, loc, getTypeConverter(), outputPaddingIntValues);
|
|
SmallVector<int64_t> strideInts;
|
|
if (!matchPattern(op.getStride(), m_TorchListOfConstantInts(strideInts)))
|
|
return rewriter.notifyMatchFailure(op,
|
|
"only support constant int strides");
|
|
SmallVector<int64_t> dilationInts;
|
|
if (!matchPattern(op.getDilation(), m_TorchListOfConstantInts(dilationInts)))
|
|
return rewriter.notifyMatchFailure(op,
|
|
"only support constant int dilations");
|
|
|
|
Value inBatch = getDimOp(rewriter, loc, input, 0);
|
|
Value inChannels = getDimOp(rewriter, loc, input, 1);
|
|
SmallVector<Value> inDims;
|
|
for (size_t i = 2; i < inRank; i++)
|
|
inDims.push_back(getDimOp(rewriter, loc, input, i));
|
|
Value weightBatch = getDimOp(rewriter, loc, weight, 0);
|
|
Value weightChannels = getDimOp(rewriter, loc, weight, 1);
|
|
SmallVector<Value> weightDims;
|
|
for (size_t i = 2; i < inRank; i++)
|
|
weightDims.push_back(getDimOp(rewriter, loc, weight, i));
|
|
|
|
// Checks for valid group size
|
|
int64_t groupSize;
|
|
if (!matchPattern(op.getGroups(), m_TorchConstantInt(&groupSize)))
|
|
return rewriter.notifyMatchFailure(op,
|
|
"only constant group size supported.");
|
|
Value groups = castIntToIndex(rewriter, loc, adaptor.getGroups());
|
|
|
|
auto validate = [&](Value toValidate, std::string err) {
|
|
Value c0 =
|
|
rewriter.create<arith::ConstantOp>(loc, rewriter.getIndexAttr(0));
|
|
Value inputValid = rewriter.create<arith::CmpIOp>(
|
|
loc, arith::CmpIPredicate::eq, c0,
|
|
rewriter.create<arith::RemSIOp>(loc, toValidate, groups));
|
|
rewriter.create<cf::AssertOp>(loc, inputValid,
|
|
rewriter.getStringAttr(err));
|
|
};
|
|
validate(inChannels,
|
|
"invalid: groups must divide input channel size evenly.");
|
|
validate(weightBatch,
|
|
"invalid: groups must divide weight batch size evenly.");
|
|
SmallVector<Value> dilationIntValues =
|
|
getAsConstantIntValues(rewriter, loc, dilationInts);
|
|
SmallVector<Value> strideIntValues =
|
|
getAsConstantIntValues(rewriter, loc, strideInts);
|
|
|
|
// Pad the input tensor according to padding.
|
|
SmallVector<Value> outDims{inBatch, weightBatch};
|
|
Value paddedInput;
|
|
if (transposed) {
|
|
Value c0 =
|
|
rewriter.create<arith::ConstantOp>(loc, rewriter.getIndexAttr(0));
|
|
Value c1 =
|
|
rewriter.create<arith::ConstantOp>(loc, rewriter.getIndexAttr(1));
|
|
Value c2 =
|
|
rewriter.create<arith::ConstantOp>(loc, rewriter.getIndexAttr(2));
|
|
|
|
// Transpose and flip weight
|
|
SmallVector<Value> weightInitDims = getTensorSizes(rewriter, loc, weight);
|
|
std::iter_swap(weightInitDims.begin(), weightInitDims.begin() + 1);
|
|
outDims[1] = weightInitDims[0];
|
|
Value weightInitTensor =
|
|
createZeroInitTensor(rewriter, loc, weightInitDims, elementType);
|
|
SmallVector<utils::IteratorType> iteratorTypes(
|
|
inRank, utils::IteratorType::parallel);
|
|
SmallVector<AffineMap> indexingMaps{
|
|
AffineMap::getMultiDimIdentityMap(inRank, context)};
|
|
weight = rewriter
|
|
.create<linalg::GenericOp>(
|
|
loc, weightInitTensor.getType(), ValueRange{},
|
|
weightInitTensor, indexingMaps, iteratorTypes,
|
|
[&](OpBuilder &b, Location loc, ValueRange args) {
|
|
SmallVector<Value> indices;
|
|
for (size_t i = 0; i < inRank; i++)
|
|
indices.push_back(b.create<linalg::IndexOp>(loc, i));
|
|
std::iter_swap(indices.begin(), indices.begin() + 1);
|
|
// Flip only the spatial dimensions (from 2 to inRank)
|
|
for (size_t flipDim = 2; flipDim < inRank; flipDim++) {
|
|
indices[flipDim] = b.create<arith::SubIOp>(
|
|
loc,
|
|
b.create<arith::SubIOp>(
|
|
loc, weightInitDims[flipDim], c1),
|
|
indices[flipDim]);
|
|
}
|
|
Value res =
|
|
b.create<tensor::ExtractOp>(loc, weight, indices)
|
|
.getResult();
|
|
b.create<linalg::YieldOp>(loc, res);
|
|
})
|
|
.getResult(0);
|
|
|
|
// Calculate padded input size, allocate tensor
|
|
SmallVector<Value> outerSizes{inBatch, inChannels};
|
|
SmallVector<Value> innerSizes{inBatch, inChannels};
|
|
SmallVector<Value> offsets{c0, c0};
|
|
for (size_t i = 0; i < numSpacialDims; i++) {
|
|
Value innerSize = rewriter.create<arith::SubIOp>(loc, inDims[i], c1);
|
|
innerSize = rewriter.create<arith::MulIOp>(
|
|
loc, innerSize, castIntToIndex(rewriter, loc, strideIntValues[i]));
|
|
innerSize = rewriter.create<arith::AddIOp>(loc, innerSize, c1);
|
|
|
|
Value offset = rewriter.create<arith::SubIOp>(loc, weightDims[i], c1);
|
|
offset = rewriter.create<arith::MulIOp>(
|
|
loc, offset, castIntToIndex(rewriter, loc, dilationIntValues[i]));
|
|
offset = rewriter.create<arith::SubIOp>(
|
|
loc, offset, castIntToIndex(rewriter, loc, paddingIntValues[i]));
|
|
|
|
Value outerSize = rewriter.create<arith::MulIOp>(loc, offset, c2);
|
|
outerSize = rewriter.create<arith::AddIOp>(loc, outerSize, innerSize);
|
|
outerSize = rewriter.create<arith::AddIOp>(
|
|
loc, outerSize,
|
|
castIntToIndex(rewriter, loc, outputPaddingIntValues[i]));
|
|
|
|
outerSizes.push_back(outerSize);
|
|
offsets.push_back(offset);
|
|
}
|
|
|
|
// Allocate padded input tensor
|
|
Value initTensor =
|
|
createZeroInitTensor(rewriter, loc, outerSizes, elementType);
|
|
|
|
// Insert input into allocated tensor
|
|
SmallVector<Value> strideIndexValues{c1, c1};
|
|
for (auto stride : strideIntValues)
|
|
strideIndexValues.push_back(castIntToIndex(rewriter, loc, stride));
|
|
SmallVector<Value> insertSizes = getTensorSizes(rewriter, loc, input);
|
|
|
|
paddedInput = rewriter.create<tensor::InsertSliceOp>(
|
|
loc, torch_to_linalg::removeSizeInformation(rewriter, loc, input),
|
|
initTensor, offsets, insertSizes, strideIndexValues);
|
|
|
|
// Calculate output dims
|
|
for (size_t i = 0; i < numSpacialDims; i++)
|
|
outDims.push_back(torch_to_linalg::getOutputDimForConvTransposeOps(
|
|
rewriter, loc, inDims[i], paddingIntValues[i], dilationIntValues[i],
|
|
castIndexToInt(weightDims[i]), strideIntValues[i],
|
|
outputPaddingIntValues[i]));
|
|
|
|
// Set stride to 1
|
|
strideInts.clear();
|
|
strideInts.append(numSpacialDims, 1);
|
|
|
|
} else {
|
|
// Pad input
|
|
paddedInput = torch_to_linalg::getDynamicZeroPaddedTensor(
|
|
op, rewriter, input, paddingIntValues, /*unpaddedDims=*/2);
|
|
|
|
// Calculate output dims
|
|
for (size_t i = 0; i < numSpacialDims; i++)
|
|
outDims.push_back(torch_to_linalg::getOutputDimForConvOps(
|
|
rewriter, loc, inDims[i], paddingIntValues[i], dilationIntValues[i],
|
|
castIndexToInt(weightDims[i]), strideIntValues[i]));
|
|
}
|
|
|
|
Value initTensor = rewriter.create<tensor::EmptyOp>(
|
|
loc, getAsOpFoldResult(outDims), elementType);
|
|
|
|
Value bias = adaptor.getBias();
|
|
Value outputTensor;
|
|
if (bias.getType().isa<Torch::NoneType>()) {
|
|
Value c0float = rewriter.create<arith::ConstantOp>(
|
|
loc, FloatAttr::get(elementType, 0.0));
|
|
outputTensor = rewriter.create<linalg::FillOp>(loc, c0float, initTensor)
|
|
.getResult(0);
|
|
} else {
|
|
auto biasType = bias.getType().cast<RankedTensorType>();
|
|
if (biasType.getRank() != 1)
|
|
return rewriter.notifyMatchFailure(op, "expect bias to be rank 1");
|
|
if (elementType != biasType.getElementType())
|
|
return rewriter.notifyMatchFailure(op, "unimplemented: type promotion");
|
|
|
|
auto resultRank = initTensor.getType().cast<RankedTensorType>().getRank();
|
|
SmallVector<AffineMap> indexingMaps = {
|
|
// bias is used to initialize the channels - dimension 1 of output
|
|
AffineMap::get(/*dimCount=*/resultRank, /*symbolCount=*/0,
|
|
rewriter.getAffineDimExpr(1), context),
|
|
rewriter.getMultiDimIdentityMap(resultRank)};
|
|
SmallVector<utils::IteratorType> iteratorTypes(
|
|
resultRank, utils::IteratorType::parallel);
|
|
outputTensor = rewriter
|
|
.create<linalg::GenericOp>(
|
|
loc, initTensor.getType(), bias, initTensor,
|
|
indexingMaps, iteratorTypes,
|
|
[](OpBuilder &b, Location loc, ValueRange args) {
|
|
b.create<linalg::YieldOp>(loc, args[0]);
|
|
})
|
|
.getResult(0);
|
|
}
|
|
|
|
auto stridesAttr = rewriter.getI64VectorAttr(strideInts);
|
|
auto dilationAttr = rewriter.getI64VectorAttr(dilationInts);
|
|
|
|
Value inputStride =
|
|
rewriter.create<arith::FloorDivSIOp>(loc, inChannels, groups);
|
|
Value weightStride =
|
|
rewriter.create<arith::FloorDivSIOp>(loc, weightBatch, groups);
|
|
|
|
SmallVector<Value> zeroOffsets(inRank, rewriter.create<arith::ConstantOp>(
|
|
loc, rewriter.getIndexAttr(0)));
|
|
SmallVector<Value> unitStrides(inRank, rewriter.create<arith::ConstantOp>(
|
|
loc, rewriter.getIndexAttr(1)));
|
|
SmallVector<Value> outDimSlice(outDims);
|
|
outDimSlice[1] = weightStride;
|
|
SmallVector<Value> inputSliceSizes{inBatch, inputStride};
|
|
inputSliceSizes.append(inDims);
|
|
SmallVector<Value> weightSliceSizes{weightStride, weightChannels};
|
|
weightSliceSizes.append(weightDims);
|
|
|
|
Value conv;
|
|
// the code so far is able to respect all numSpacialDims
|
|
// the code below this point is numSpacialDims specific and groupSize specific
|
|
// TODO: factor out the above code into a helper function, and then separate convolution into:
|
|
// - grouped 1d-3d
|
|
// - ungrouped 1d-3d
|
|
if (groupSize == 1) {
|
|
// TODO: 3D case
|
|
switch (numSpacialDims) {
|
|
case 1:
|
|
conv = rewriter
|
|
.create<linalg::Conv1DNcwFcwOp>(
|
|
loc, outputTensor.getType(),
|
|
ValueRange{paddedInput, weight}, outputTensor,
|
|
stridesAttr, dilationAttr)
|
|
.getResult(0);
|
|
break;
|
|
case 2:
|
|
conv =
|
|
rewriter
|
|
.create<linalg::Conv2DNchwFchwOp>(
|
|
loc, outputTensor.getType(), ValueRange{paddedInput, weight},
|
|
outputTensor, stridesAttr, dilationAttr)
|
|
.getResult(0);
|
|
break;
|
|
case 3:
|
|
conv =
|
|
rewriter
|
|
.create<linalg::Conv3DNcdhwFcdhwOp>(
|
|
loc, outputTensor.getType(), ValueRange{paddedInput, weight},
|
|
outputTensor, stridesAttr, dilationAttr)
|
|
.getResult(0);
|
|
break;
|
|
default:
|
|
return rewriter.notifyMatchFailure(
|
|
op, "unimplemented: only 1D, 2D, and 3D convolution supported");
|
|
};
|
|
Type newResultType = getTypeConverter()->convertType(op.getType());
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, conv);
|
|
return success();
|
|
} else {
|
|
if(numSpacialDims != 2)
|
|
return rewriter.notifyMatchFailure(
|
|
op, "unimplemented: only 2D grouped convolution supported");
|
|
|
|
// Special depthwise case
|
|
auto inShape = makeShapeTorchCompatible(
|
|
input.getType().cast<RankedTensorType>().getShape());
|
|
auto weightShape = makeShapeTorchCompatible(
|
|
weight.getType().cast<RankedTensorType>().getShape());
|
|
if (weightShape[0] != kUnknownSize && inShape[1] == groupSize &&
|
|
weightShape[0] % inShape[1] == 0 && weightShape[1] == 1) {
|
|
// Collapse weight shape
|
|
SmallVector<ReassociationIndices, 4> collapsedDims = {{0, 1}, {2}, {3}};
|
|
SmallVector<int64_t> collapsedShape{
|
|
(weightShape[0] == kUnknownSize ? kUnknownSize
|
|
: weightShape[0] * weightShape[1]),
|
|
weightShape[2], weightShape[3]};
|
|
// TODO: audit possibility of sparsity on this tensor
|
|
Type collapsedType = RankedTensorType::get(
|
|
makeShapeLLVMCompatible(collapsedShape), elementType);
|
|
Value collapsedWeight = rewriter.create<tensor::CollapseShapeOp>(
|
|
loc, collapsedType, weight, collapsedDims);
|
|
|
|
conv = rewriter
|
|
.create<linalg::DepthwiseConv2DNchwChwOp>(
|
|
loc, outputTensor.getType(),
|
|
ValueRange{paddedInput, collapsedWeight}, outputTensor,
|
|
stridesAttr, dilationAttr)
|
|
.getResult(0);
|
|
|
|
Type newResultType = getTypeConverter()->convertType(op.getType());
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, conv);
|
|
return success();
|
|
}
|
|
|
|
// Grouped case, use the grouped conv linalg op
|
|
auto expandGroups = [&](Value tensor, size_t dim) {
|
|
auto inType = tensor.getType().cast<RankedTensorType>();
|
|
auto inShape = makeShapeTorchCompatible(inType.getShape());
|
|
|
|
SmallVector<int64_t> outShape;
|
|
for (auto i = 0; i < (long)inShape.size(); i++) {
|
|
if (i == 1) {
|
|
outShape.push_back(groupSize);
|
|
}
|
|
if (i == (long)dim) {
|
|
outShape.push_back(inShape[i] == kUnknownSize
|
|
? kUnknownSize
|
|
: inShape[i] / groupSize);
|
|
} else {
|
|
outShape.push_back(inShape[i]);
|
|
}
|
|
}
|
|
|
|
SmallVector<ReassociationIndices> indices;
|
|
for (auto i = 0; i <= (long)inShape.size(); i++) {
|
|
if (i == (long)dim) {
|
|
indices.push_back({i, ++i});
|
|
continue;
|
|
}
|
|
indices.push_back({i});
|
|
}
|
|
|
|
auto retType = inType.clone(makeShapeLLVMCompatible(outShape));
|
|
return rewriter.create<tensor::ExpandShapeOp>(loc, retType, tensor,
|
|
indices);
|
|
};
|
|
|
|
// expand F,C,H,W -> G,F/G,C,H,W
|
|
auto expandWeight = [&](Value tensor) {
|
|
auto inType = tensor.getType().cast<RankedTensorType>();
|
|
auto inShape = makeShapeTorchCompatible(inType.getShape());
|
|
|
|
SmallVector<int64_t> outShape{
|
|
groupSize, (inShape[0] == kUnknownSize ? kUnknownSize
|
|
: inShape[0] / groupSize)};
|
|
outShape.append(inShape.begin() + 1, inShape.end());
|
|
|
|
SmallVector<ReassociationIndices> indices{{0, 1}};
|
|
for (auto i = 2; i <= (long)inShape.size(); i++)
|
|
indices.push_back({i});
|
|
|
|
auto retType = inType.clone(makeShapeLLVMCompatible(outShape));
|
|
return rewriter.create<tensor::ExpandShapeOp>(loc, retType, tensor,
|
|
indices);
|
|
};
|
|
|
|
Value paddedInputExpanded = expandGroups(paddedInput, 1);
|
|
Value weightExpanded = expandWeight(weight);
|
|
auto expandOutputTensor = expandGroups(outputTensor, 1);
|
|
|
|
// TODO: add 1D and 3D case
|
|
conv = rewriter
|
|
.create<linalg::Conv2DNgchwGfchwOp>(
|
|
loc, expandOutputTensor.getResultType(),
|
|
ValueRange{paddedInputExpanded, weightExpanded},
|
|
expandOutputTensor.getResult(), stridesAttr, dilationAttr)
|
|
.getResult(0);
|
|
|
|
conv = rewriter.create<tensor::CollapseShapeOp>(
|
|
loc, outputTensor.getType(), conv,
|
|
expandOutputTensor.getReassociationIndices());
|
|
Type newResultType = getTypeConverter()->convertType(op.getType());
|
|
rewriter.replaceOpWithNewOp<tensor::CastOp>(op, newResultType, conv);
|
|
return success();
|
|
}
|
|
}
|
|
};
|
|
} // namespace
|
|
|
|
void mlir::torch::torch_to_linalg::populateLinearPatternsAndLegality(
|
|
TypeConverter &typeConverter, RewritePatternSet &patterns,
|
|
ConversionTarget &target) {
|
|
MLIRContext *context = patterns.getContext();
|
|
target.addIllegalOp<AtenMmOp>();
|
|
patterns.add<ConvertAtenMmOp>(typeConverter, context);
|
|
target.addIllegalOp<AtenFlipOp>();
|
|
patterns.add<ConvertAtenFlipOp>(typeConverter, context);
|
|
target.addIllegalOp<AtenMatmulOp>();
|
|
patterns.add<ConvertAtenMatmulOp>(typeConverter, context);
|
|
target.addIllegalOp<AtenBmmOp>();
|
|
patterns.add<ConvertAtenBmmOp>(typeConverter, context);
|
|
target.addIllegalOp<AtenConvolutionOp>();
|
|
patterns.add<ConvertAtenConvolutionOp>(typeConverter, context);
|
|
}
|